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To: Elmer who wrote (140610)	7/31/2001 11:17:36 PM
From: Dan3	Respond to of 186894

Re: Intel's Mark Bohr, director of process architecture and integration; associate Kaizad Mistry and others have said that as CMOS scaling continues, the reduced leakage possible with SOI diminishes They've also said that very low-K materials are necessary at smaller feature sizes unless SOI is used. There seems to be something of an either or between super low-k and SOI. We'll know soon enough. AMD had Dresden up and running and was testing production lots when they decided that SOI was so important they built a FAB addition on top of the existing FAB while that FAB was ramping so that they could go to SOI. That's the clearest signal I've seen since Intel sued VIA to stop it from shipping PC133 (which convinced me that Rambus was a dud, and Intel was screwed for using it) back in July of 1999 Message 10757642 ). How long did it take you to figure out that Rambus was a huge problem for Intel?

To: Elmer who wrote (140610)	8/1/2001 2:20:08 AM
From: Paul Engel	Respond to of 186894

Elmer - Re: "Sun and TI reject SOI for UltraSparc" Unfortunately for SUN, they could have probably used SOI for that UltraDawg III. TI, unfortunately, seems over their head in semiconductor process technology - and can't handle SOI. Paul