To: wanna_bmw who wrote (50818 ) 8/12/2001 3:09:30 PM From: combjelly Read Replies (2) | Respond to of 275872 "but the idea is that with or without the long Pentium 4 pipeline, if copper was a limiting factor, Intel would not have made it to 2.0GHz on their aluminum process." Or possibly Intel could have gotten to 2.5GHz or 3GHz instead of 2GHz if they had used copper. Paul alludes to the real reason AMD can run their Athlons as fast as they do, they have a Leff of 90nm or less with their copper process, you likely cannot do that in Al. Paul sees it as a problem, he apparently considers a Leff that small to be more characteristic of a 0.13 micron process than a 0.18 micron process. Historically, though, that wouldn't be the the case, Leffs typically wound up something close to 50% of the linewidths in a performance process, Al just poops out before Intel could do that. So AMD is closer to historical norms than Intel is. You are giving Intel way too much credit. Historically speaking, Intel has emphasised yields and manufacturability, AMD has been able to squeeze a great deal of performance out of their processes, albeit often with a lower yield. So Intel has been the king of the nearly, or even actually, 100% good wafer, often at the expense of binspilts. AMD has been king of the binsplits, but sometimes only yielding a handful of good die per wafer as apparently happened when they tried to push the speed of the K6-2. Just out of curiosity, do you understand about pipeline stages in a processor? The fact that the P4 with it's additional pipeline stages clocks higher than the Athlon does not imply the P4 transistors are switching faster. In fact, because the Athlon stages have to do more work per stage, it very well may be that the AMD transistors switch faster, definitely the case for anything but the double-pumped sections. Assuming that there aren't any speed path restrictions, you could reasonably expect the P4 to hit closer to 3GHz than 2GHz if the TBird cores can run at 1.5GHz, assuming an equal process. Now true, the double-pumped sections and the 2 cycle L1 cache may be the limiting factor because of the speed of the transistors that are required. But if AMD can reach or exceed 3GHz with their Hammers and have the same, or better, IPC of their Palomino cores, then Intel will have made a bad decision in the P4. Nothing like clocking at the same speed or less than a competitor and being 30% or more behind in IPC...