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To: Dan3 who wrote (141963)	8/19/2001 4:21:41 PM
From: wanna_bmw	Read Replies (3) \| Respond to of 186894

Dan, as usual, you post is littered with inconsistencies. "Although a few tricks remain at 0.13 micron to counteract some of these problems, at 0.10 micron and below they become unmanageable." Intel has already demonstrated gate lengths down to 20nm, without SOI. Ghavam Shahidi is only able to speak on his own behalf, not on the behalf of other manufacturers who have different ways to solve the problems that he describes. Maybe you should research what Intel says, instead of taking what IBM says as gospel. An open minded person considers all the information, while you close your mind to everything that Intel says. Good job. "Remember that AMD didn't suffer a yield crash in late 1999" AMD has had several problems with yield, even over the past year. When Intel launched the 1GHz Pentium III and had trouble meeting demand, AMD was right along with them having the same problems with the 1GHz Athlon. For a while earlier this year, AMD had issues providing enough 1.2GHz Athlons as well. It took several weeks for resellers to have any stock at all. The upper bins are always a challenge, for Intel and AMD alike, but you only seem to consider half of the issue. "Intel, driven to use a blind etching to go beyond the limits of its .18 lithography process" Wrong again, Dan. this notched poly technique is still used in all of Intel's processes, and it's able to meet demand for the 25+ million chips that Intel ships every quarter. Even Intel's .13u process is working and producing .13u mobile chips with 70nm gates as we speak. Why is it that you can never seem to find any FUD that people here can't dispute? Probably because you're desperate, and doing everything you can to offer the most idiotic of theories, but people here are too smart to believe your bull. Better luck next time. wanna_bmw

To: Dan3 who wrote (141963)	8/20/2001 11:45:58 AM
From: semiconeng	Read Replies (1) \| Respond to of 186894

Somebody already used up a good part of the benefit of moving to .13 while still on .18, but maybe you should read up a little more on "notched gates" before you decide which of the two main Windows compatible processors that description is best applied to. So, I probably am reading this wrong, but it seems like you are suggesting that Notched Poly is being used at 0.13u. It's not. Notched Poly was a 0.18u technique only, and was not incorporated into intel's 0.13u Process. Also, the assertion that notched gates were hard to do may have been true for IBM, but it wasn't difficult for intel. You simply adjusted the Etchers recipe during the latter pat of the Poly Etch to change from an AnIsotropic (Straight Down) Etch to an Isotropic (All Direction) etch. But, as I said, it's all Moot Point. Notched Poly is ancient history. Not needed for 0.13u process.... At least not intel's. Semi