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Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: Charles Gryba who wrote (142041)	8/20/2001 5:22:02 PM
From: semiconeng	Respond to of 186894

SemiconEng, I don't want to argue hypothetical situations. ( Like who's getting steppers first when there's a shortage ). Also, if Intel can do .13 without 193nm Steppers why can't AMD do the same? ( Is this a stupid question ? ) Constantine So, I don't think it's hypothetical, just logical. If I'm a stepper supplier, and I have a small order from one company, and a large order 3 times the size from another company, I'm going to service my larger order customer first. Maybe Nikon and/or SVGL does it differently, I just don't think so. I could be wrong....... Not a stupid question at all. Of course AMD can also use Phase Shift Masks for 0.13u, they probably will. I'm sure that someone can make the masks for them. Of course, since intel makes their own masks, and certainly already has those masks in hand, and knows their masks work, and already has their 0.13u Process ramping, and producing volume product, it's a question of supply, and availability. Intel has it working in volume now, AMD doesn't. By the time AMD does get it working, intel should be on their second stepping, or maybe even their third. David and Goliath was the exception... Not the rule. The race does not always go to the swiftest, nor the battle to the strongest.... But that's the way to bet. Semi

To: Charles Gryba who wrote (142041)	8/20/2001 5:33:07 PM
From: fingolfen	Read Replies (2) \| Respond to of 186894

I don't want to argue hypothetical situations. ( Like who's getting steppers first when there's a shortage ). Also, if Intel can do .13 without 193nm Steppers why can't AMD do the same? ( Is this a stupid question ? ) I'm not semi, but I can answer this one. The smallest features being printed on any semiconductor at this point are polysilicon gates (although contact is starting to get nasty as well largely because of the tight pitch, or the number of contact holes in a given area). The width for the Intel process is 70-80nm according to published sources. This means that the final gate width is 25%-33% of the "width" of the wavelength of the light initially used to pattern it (248nm). There are a variety of ways to do this (phase shift masks are but one option). AMD can use all of the same tricks, the only problem is that 70nm or thereabouts is where some of the tricks stop working. AMD is already running very narrow gate widths at this point, and to reduce them further (say to the 50-60nm regime) is going to require either 193nm, or pushing the existing tricks to their very breaking point (read yield fallout levels). The steppers for 193nm are not generally available, which leaves pushing the envelope on existing 248nm lithography to or past the breaking point.