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Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: Dan3 who wrote (144723)	10/5/2001 1:47:48 AM
From: wanna_bmw	Respond to of 186894

Dan, Re: "One of 5 instructions is a branch, and going to main memory after a cache miss will cost several hundred CPU cycles!" The same thing applies to the Athlon. And your point is...? wanna_bmw

To: Dan3 who wrote (144723)	10/5/2001 12:25:20 PM
From: Noel	Read Replies (2) \| Respond to of 186894

Dan, RE: One of 5 instructions is a branch, and going to main memory after a cache miss will cost several hundred CPU cycles! You have put two unrelated facts in the same sentence to try and create some kind of subliminal logical connection. Excellent wordsmithing but you are not fooling anyone. I agree that one of out every 5-6 instructions is a branch. I also agree that going to main memory after a cache miss is expensive. But how often do you think the processor needs to fetch an instruction from main memory after a mispredicted branch. I am sure it does not happen every 5 clock cycles. I am also sure that it does not happen every million clock cycles. The truth is someone in between. I would not cast any aspersions on this CPU until I knew what the answer to that was. Also, as WBW said I don't see how any other CPU would not have the same problem.