Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: The Duke of URL© who wrote (144861)	10/8/2001 12:39:03 AM
From: wanna_bmw	Read Replies (2) \| Respond to of 186894

Duke, Re: "Intel announces new chip-packaging technology" I don't know if you are aware just how meaningful this is! Let me show you a few things. By removing the solder balls and placing the die directly into the packaging, Marcyk said it eliminates roughly three layers of the six or seven layers of metal that compose a processor such as the Pentium 4. Eliminating these metal layers does several very positive things for the Pentium 4. The first is that it reduces the cost of manufacturing masks for new revisions and changes in the core design. Every metal layer requires such masks, and eliminating three of them could save Intel at least a million dollars on every revision of the Pentium 4 that it produces (including the many revisions that never leave Intel, such as those used for testing or R&D). In addition, fewer metal layers mean that the part can go through the fab faster, as there are less stages that need to be done. This could save Intel anywhere from several days to more than a week of manufacturing time, and can allow for millions of dollars in time to market value. As far as I know, early reports showed AMD's .13u process as supporting more layers than their .18u process. While this allows for more complex designs and is a positive process improvement in that respect, more layers means more expensive parts and longer time through the fabs. In Intel's case, it appears as if the same complexity can be achieved through less layers because of the new packaging. Because the distance the data must travel is shorter, the new packaging helps boost the overall speed and performance of the chip. Intel calls the new packaging technology, for which it has already secured a number of patents, bumpless build-up layer, or BBUL, packaging. This is another very positive advancement. With >2GHz speeds, EMI interference becomes much more of an issue. Shorter trace lengths greatly improve signal integrity. It's also good that Intel has secured this technology with patents. The technology also reduces the thickness of the package and, as such, could cut power-consumption. In using the new technology, Intel said that, in essence, a package is "grown" around the silicon core. Thinner, lower power packages are ideal for mobile applications. Given the current high power of the Pentium 4, this could be crucial to getting high speeds in the mobile variety next year, without breaking the thermal envelope. This gives me much more faith in Intel's mobile strategy. All and all, this is a great advancement. Thanks for the link, Duke! wanna_bmw