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To: dale_laroy who wrote (60275)	10/25/2001 4:41:35 PM
From: Tenchusatsu	Respond to of 275872

Dale, <Will this recompiled code run on Merced, and if so, will it be as fast a code compiled for Merced?> Yes and probably not. Tenchusatsu

To: dale_laroy who wrote (60275)	10/25/2001 4:53:24 PM
From: Win Smith	Read Replies (1) \| Respond to of 275872

Will this recompiled code run on Merced, and if so, will it be as fast a code compiled for Merced? It doesn't sound very backward compatible to me, but it's not clear that there's going to be enough Merceds out there to care about, either. Elsewhere on that thread, there were these curious little tidbit. Thanks for clarifying that. Was there any discussion of McKinley shipping at 1.2 GHz (the frequency mentioned in the infamous withdrawn ISSCC paper)? Reportedly a frequency shortfall (1.2 -> 1.0 ?) has led to tension and finger pointing between the Intel and HP designers on the project I was also surprised about Intel's announcement that Madison (McKinley core in 0.13 um with 6 MB L3) would intro at 1.0 GHz. That doesn't reflect well on the scalability of IA64 processor. After all, no one expects P4 Northwood to be introduced at 1.4 and 1.5 GHz. :-) realworldtech.com Somehow, all the FUD peddling on the Itanic front just doesn't have quite the weight it had before mysterious Merced finally emerged from the mist. Elsewhere, I found a more current roadmap ref, from Mike Magee's old rag, which confirms the 1ghz Madison thing. In the IA-64 world, McKinley's commercial release appears to have been put back from May 2002 to June 2002, but given Intel's fluid approach to Itanium releases, with initial pilot programmes and later full-scale roll-outs, that's not entirely surprising. Nor is the arrival of Madison, the successor to McKinley, which will now take place early 2003 rather than Q4 2002. New specs. are listed: Madison will have a massive 6MB of on-die L3 cache, and Madison will debut at 1GHz. theregister.co.uk

To: dale_laroy who wrote (60275)	10/25/2001 9:56:47 PM
From: combjelly	Respond to of 275872

"Will this recompiled code run on Merced, and if so, will it be as fast a code compiled for Merced? " It depends. And this is the dirty little secret of VLIW code. When you re-compile to take advantage of more execution units, you can lose backwards compatibility. EPIC, with it's instruction bundles, does allow for some degree of backwards compatability, but at some point that goes away. This is the one factor that makes me extremely dubious about VLIW. You lose that backwards compatibility at some point. Either that, or you lose the advantages with going to a newer architecture. As the P4 illustrates so starkly, at some point the newer processors won't necessarily run the legacy code much faster...