Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: dale_laroy who wrote (61133)	10/30/2001 10:26:10 AM
From: fyodor_	Read Replies (2) \| Respond to of 275872

Dale: But you are right, they did not significantly change the micro-architecture, just increased and rebalanced the pipeline plus making a few other changes that could be made with Athlon itself. There are some indications in AMD's rhetoric that there are changes to the FPU. I've seen comments from AMD that SSE/SSE2 will be huge, especially in combination with x86-64 (long mode) - something along the lines of x87 performance not even being relevant. I don't think it's unrealistic to expect significantly improved SSE performance (as well as stellar performance from the SSE2 unit) in the Hammer. -fyo

To: dale_laroy who wrote (61133)	10/30/2001 12:02:52 PM
From: wanna_bmw	Read Replies (1) \| Respond to of 275872

Dale, Re: "My SWAG is that they will achieve at least a 20% increase in peak clock rate, slightly higher average IPC for single tasking, and significantly higher IPC for multitasking and multiprocessing." Regarding 20% higher clock rate, I doubt it, simply because there is not a linear relationship between the number of pipeline stages and the extra clock frequency that can be obtained. AMD may have extended the pipeline by 20% (12 stages vs 10), but that doesn't mean that frequency will improve that much. BTW, you are speaking with respect to Barton, right? Regarding IPC in single threaded apps, I agree, since an improved branch prediction rate, and an improved TLB system will no doubt give Hammer incremental increases in performance, overall. Regarding IPC of mutlthreaded apps in multiprocessor mode, I think that depends on your definition of "significant". I think that, like the 760-MP, AMD will have a more linear increase in performance by adding more processors than Intel can with a shared bus. However, how much more is questionable at this point. wanna_bmw