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To: Ali Chen who wrote (148839)11/19/2001 3:13:09 PM
From: Paul Engel  Read Replies (3) | Respond to of 186894
 
Ban Ban Ail Moron - Re: ". Paul, please do comment on the Idsat and leakage too.
It is at least close to your background. I am waiting
impatiently <g>... "

Your wait is over, you complete a$$hole -

Why don't you get the proper Data Sheet for Intel's Mobile Pentium ///-M - and you won't make such a COMPLETE FOOL OF YOURSELF AGAIN !!!

The CORRECT Datasheet is:

ftp://download.intel.com/design/mobile/datashts/29834002.pdf

And the proper value for current draw are:

ICC,DPRSLP Processor Deeper Sleep Leakage current 1.70 A

That is 1.70 Amps, you nit picking moron



To: Ali Chen who wrote (148839)11/19/2001 5:51:20 PM
From: Joseph Pareti  Read Replies (1) | Respond to of 186894
 
RE If you compare this with AMD process results,
amd.com.
for 1800+ XP we have (p.31):
Icc typical = 33.8 A
Icc stop grant = 0.66A
or the leakage is less than 2%.

I couldn't open the link above.
Further, I suppose this AMD process is 180 nm ?
Is the 0.66 A related to normal operation mode, hence comparable to the 8 Amps ?



To: Ali Chen who wrote (148839)11/19/2001 7:59:57 PM
From: Robert Salasidis  Respond to of 186894
 
Since leakage current increases with increasing temperature, it would be interesting to know what the leakage current, at minimum voltage, at the expected core temperature in that environment would be (the specs are for Tjmax).

If the behavior is the same as discreet MOSFETs, then leakage would be at least an order of magnitude less at 25 deg C vs 100 deg (Tj max).