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To: Ali Chen who wrote (148859)11/19/2001 4:58:34 PM
From: Charles Gryba  Read Replies (1) | Respond to of 186894
 
Ali, I just read the pdf section where it mentions the leakage. Paul is arguing semantics since you originally mentioned that the sleep "leakage" was 8 amps. Since the PIII-M sleeps @ less than 1 Volt then the leakage is 1.7 when sleeping. You are correct however that when fully operational the PIII-M leaks more than 8 amps. That's horrendous. Paul is upset because he knows how bad that is.

Constantine



To: Ali Chen who wrote (148859)11/19/2001 5:06:46 PM
From: wanna_bmw  Read Replies (1) | Respond to of 186894
 
Ali, why do you suppose AMD has much better leakage levels in their transistors? Why would they be spending all the effort going to SOI if their transistors were so superior? Likewise, why would Intel be rejecting SOI if their transistors were so badly in need of it? Might there be something off the data sheets that you're missing?

wbmw



To: Ali Chen who wrote (148859)11/19/2001 5:23:57 PM
From: Paul Engel  Read Replies (4) | Respond to of 186894
 
Ban Bail Ail Moron - Learn to get the CORRECT DATA SHEET.

1.7 Amps is the Deeper Sleep current draw.

In the words of Ban Bam Lewinsky Dan - YOU WERE WRONG - LIVE WITH IT !

Your time would be better spent advising AMD how to make a profit - a feat that they are having extreme difficulty with.