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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: Ali Chen who wrote (64045)	11/19/2001 8:10:39 PM
From: fyodor_	Respond to of 275872

Ali: What could be possibly unclear? ROFL! Believe it or not, most people who follow AMD common probably don't know what leakage current is and how it is defined for a sub-micron microprocessor&#133 Regardless, I certainly appreciated the detailed explanation (mostly the part about sleep mode current, which I couldn't place in this whole discussion). -fyo

To: Ali Chen who wrote (64045)	11/19/2001 8:17:05 PM
From: combjelly	Read Replies (1) \| Respond to of 275872

"With 50% leakage at 1.13GHz on P-III, there are not much left, IMHO" Sorta makes you wonder how Intel is going to achieve those clock rates they are projecting for next year, doesn't it? I guess the first hint we had of this was when it was noticed that Tualatin was drawing about the same amount of power at the same clock rate as the PIII, and Tualatin was at a lower voltage. Is Intel expecting tweaks to their process to solve this problem? I wonder if AMD ran into a similar problem when they tried their original shrink to 0.13 micron. I do know that they suddenly stopped talking about 0.15 micron and after a quarter or so of silence, suddenly SOI was the future...

To: Ali Chen who wrote (64045)	11/19/2001 8:26:25 PM
From: Gopher Broke	Read Replies (1) \| Respond to of 275872

Cool post Ali, thanks. Have you heard anything about Northwood? Could the delay be because Intel are trying to tune their .13 process? Am I right in thinking that this leakage is a result of contamination of the Si substrate? Is this why AMD is so keen to switch to SOI?

To: Ali Chen who wrote (64045)	11/20/2001 2:51:07 AM
From: Pravin Kamdar	Read Replies (1) \| Respond to of 275872

Ali, However, the main point was to find out how much of headroom has left in the current Intel technology, and the way to measure it must be straightforward - under the nominal operating conditions Isn't Intel's operating voltage on any given technology typically lower (by 0.1-0.2 Volts) than AMD's? If so, Intel has made the decision to trade-off lower operating power for higher leakage current. Their transistor channels must be less depleted when off, so that they can be effectively inverted under a lower Vcc when turned on. I am assuming that the majority of the leakage current with Intel transistors is channel leakage, and not the junction (to bulk) leakage that can be limited using SOI -- given Intel's stance on SOI. Pravin.