Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: fingolfen who wrote (149826)	11/27/2001 12:52:58 PM
From: AK2004	Read Replies (1) \| Respond to of 186894

fingolfen re: I understand the problem you're having here Albert... I do not believe that I have a problem. I am curious about "thin SOI" though. There were a number of the articles published before intel announcement (some references on moderated amd thread) about "thin SOI". I am not sure how to interpret "thin SOI" as intel's innovation. Regards -Albert ps the matter with bmw was not really about validity of approach but rather that he needed a proof of generic statements made by Intel. The impression that the article gives is that Bohr listed pro and cons and concluded that soi (in general) is a waste of time.

To: fingolfen who wrote (149826)	11/27/2001 9:12:19 PM
From: wanna_bmw	Respond to of 186894

Fingolfen, Re: "I understand the problem you're having here Albert... I've actually looked at the entire Intel presentation based on the new transistor, and it is a new transistor design. All of the arguments made previously deal with SOI as it is produced and utilized today. The system Intel detailed is nothing like anything anyone produces today" Thanks for phrasing the concept better than I could. I have been debating this with Albert for some time now, and until now he hasn't offered any proof. But now that he shows proof, it isn't showing what I asked him to prove. I was trying to tell him that Intel was always against IBM's implementation of SOI, not the concept of having an insulating layer underneath the silicon. Intel even calls their transistors DST instead of SOI in order to enforce the idea that they are indeed much different. Therefore, I think Albert will be hard pressed to argue that Intel was mistaken in claiming that SOI has no importance, since the very basis of his argument was fundamentally incorrect. wbmw

To: fingolfen who wrote (149826)	11/27/2001 11:29:37 PM
From: kapkan4u	Read Replies (2) \| Respond to of 186894

<I understand the problem you're having here Albert... > I understand the problem you are having here Finger... The biggest problem is that you have no clue. From a 2-year-old IBM white paper on SOI: www-3.ibm.com "One solution to the bipolar transistor dilemma that has been under strong consideration over the last two-to-three years was to use very thin layer SOI films (less than 0.1 micron) called fully-depleted films." eet.com "But IBM fellow Ghavam Shahidi said the history effect has been overblown. "The history effect is less [of an issue] for fully depleted SOI, but it is a very small effect to begin with, and it's hard to measure. I'm not sure why Intel is making it a big deal," he said. In fact, fully depleted SOI is not necessarily immune from floating-body effects, Shahidi contended. "If the source and drain are high, the body will charge up; that's a condition you see even in fully depleted [SOI]," he said. Moreover, fully depleted SOI worsens short-channel effects, making it hard to attain multiple threshold voltages. And analog circuits still need to make contact with the body, which can't be done with fully depleted designs. I think this shows [Intel's] lack of experience," Shahidi said." So your first argument that fully depleted SOI is something new is bogus. IBM, AMD and others have been looking at thin-film SOI for years. Your second argument about the uniqueness of high-k gate is equally bogus. From the same article: "Intel's decision to adopt high-k dielectric material for insertion beneath the transistor gate isn't surprising, since most IC manufacturers are moving in the same direction. High-k dielectric films promise to let chip makers grow a thicker insulation layer to reduce leakage while keeping capacitance constant." As a matter of fact, AMD has high-k SOI on their 90nm node roadmap. While IBM, AMD and other have been quietly researching these technologies for years, Intel woke up some day and pulled an overnighter wiz-bang slide picture show. Kap