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To: Joe NYC who wrote (151355)12/6/2001 4:01:34 PM
From: wanna_bmw  Read Replies (2) | Respond to of 186894
 
Joe, Re: "Why in the world would L2 run at the full speed, and Trace cache at full speed? Trace cache is performance critical, smaller, used all the time, L2 is less performance critical, large die area, and is used only on L1 / Trace cache misses? It doesn't pass the common sense test."

You are probably right about the caches. In terms of logical units, the caches are not performance critical - they have a latency. Therefore, if it makes it easier to implement the slower clock, Intel probably did so. Even the fastest caches in the Pentium 4, the L1 data and traces caches, both operate at a 2-cycle latency, so it doesn't make sense to use a full speed clock.

Slightly off topic, but I wonder at which speed the Athlon's caches run at. The Athlon L1 caches both have a 4-cycle latency, so do they run at 1/4th the clock frequency?

wbmw



To: Joe NYC who wrote (151355)12/6/2001 4:31:24 PM
From: Tenchusatsu  Read Replies (2) | Respond to of 186894
 
Joe, <Why in the world would L2 run at the full speed, and Trace cache at half speed?>

With the L2 cache, it's like RDRAM. The "speed" is judged by how fast the data transfers over the bus, not by its latency. For Pentium 4, data from the L2 cache is transferred at full speed. The latency is variable depending on clock speed, etc., but that's the way it's always been ever since the days of Pentium Pro.

As for the trace cache, it can run at half speed because most of the transfers in and out of that cache are very sequential, not random like the L1 data cache. The trace cache can afford to run at half speed if it provided double the uops per transfer. Also, the trace cache needs to be relatively large (12K uops); however, larger caches are typically slower.

Tenchusatsu