To: whortso who wrote (66513 ) 12/28/2001 3:02:27 PM From: pgerassi Read Replies (1) | Respond to of 275872 Whortso: I dispute his claim that they made 40 million chipsets! Besides those are not made on 0.18u aluminum. They are made on a larger process so they do not take away WPW for P4 production. To compare output, you must look at those that use the same process level 0.18u, aluminum for P4 and copper for Fab 30 AXPs. I determined that about 2000WPW should satisfy output for Q3 which had to start in Q2 (remember the 13 week or more lag from wafer start to packaged good CPU die). Assuming a linear ramp (40% begin Q2, 60% end of Q2, 80% end of Q3 and 100% end Q4), an average od 2500WPW was available for those sold in Q3. Some of those were probably moving to 0.13u, so they are not far off. The same calculations with the lower bin split yield of P4 for Intel came to 20K WPW for Q3 for all CPUs made in 0.18u. That is just what the one and a half of the 1.4 million a week Coppermine Fab Elmer yells about does. Far less than 5 fabs Intel has at 0.18u aluminum. Just 40% of production. 8K WPW would make all those Celerons, P3s and Xeons. So 42K WPW should make at least 3.5 times the P4s. The only reason is that Intel can't make enough money on each of the high bin P4s to justify the amount they need to make just one. Thus, the prices of those high bins are too low and are thus, short. Why are they too low? Intel is selling them below what it really costs to make them, and if they sell too many, the profits from other higher margin product sales would be eaten up. Thus, this shortage is due to the design of the P4 and the policy to deny AMD profits. If it persists, the policy will fail. Pete