To: hmaly who wrote (71841 ) 2/18/2002 8:22:53 AM From: dale_laroy Read Replies (3) | Respond to of 275872 >What I am saying is that the bigger die size of the P4 doesn't equate to higher performance, as Charles suggests it should. Thus at 130mm, P4 will be 50% bigger, with no performance benefit; and that is a inefficient design. Perhaps Intel put in all of those extra transistors to scale up to 10 ghz; as Wanna suggested a wk. ago.< In analysing the distribution of transistors on the P4 (Willamette), Paul DeMone came to the conclusion that P4 has a lot of "dark" transistors, that is transistors that have no claimed function. It is hypothesized that these are for implementing Jackson Technology, which may not be functional in Willamette nor even Northwood. It is anticipated that these transistors may become functional at the 90nm node. >Maybe, but right now, it isn't doing it, and the price war probably will be sooner than later.< You are right about Intel not being in a position to fight an all out price war at 130nm. However, at 130nm AMD can not muster sufficient volume to cripple Intel. All Intel has to do is sit back, let AMD fight the price war alone, and charge premium prices for that market share AMD can not service. Then, Intel can fight a down and dirty price war at the 90nm node where Jackson Technology may kick in and die size will not be as big an issue, since package price will make up a much higher percentage of total costs. > However maybe Intel put in all of those transistors to meet a big die theory, not for performance benefits. If Intel did, then Intel is screwed in a price war as lean and mean wins them; not fat and inefficient.< Intel's big die theory is that they can derive sufficient utility from a big die to force AMD to match, or at least nearly match, the die size of Intel's processor to deliver competitive performance. One way to do this is with L2 cache, they doubled P4 L2 cache at 130nm, and could very easily double it again at 90nm. If AMD matches this with the 90nm Clawhammer, Clawhammer will not be nearly as small as AMD anticipates. If they don't, Intel could end up demanding even more of a price premium than they currently do. >I was reading the other day, that Intel had a production costs of app. ~ $100 per P4 at 180 mm. I don't remember where. otherwise I would link. On this board we have assume a cost of app $60/ XP, for a similar performance chip. If this is true, the extra production costs Intel has will make Intel vulnerable in a price war.< But, even at 130nm the cost of P4 is well below $100 per unit of production. And, even AMD claims that Intel will slash their silicon costs by as much as 30% with the move to 300mm wafers. It is quite possible that a 90mm2 65nm P4 on 300mm wafers could be cost competitive with a 65mm2 65nm Clawhammer on 200mm wafers.