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To: Dan3 who wrote (80366)5/21/2002 12:32:00 AM
From: Ali ChenRespond to of 275872
 
"TSMC's research chief mulls next-gen process knots"

"Mulls"? Don't they plan to start production of 90nm wafers
this fall, for revenue?

- Ali



To: Dan3 who wrote (80366)5/21/2002 12:46:29 AM
From: Bill JacksonRespond to of 275872
 
Dann, Well, I see the older machines as quite capable of most office apps. Work stations want more performance, as do gamers and the wannabee fastest crowd, but offices can get by very well on older P-3 machines.
In addition the cost per seat for software and rollout dwarfs the hardware cost these days. So to avoid those costs they stay with tried and true.

Bill



To: Dan3 who wrote (80366)5/21/2002 4:15:26 AM
From: TGPTNDRRead Replies (2) | Respond to of 275872
 
Dan3, Thanks for the links.

eet.com

TSMC's Sheng put the bottom line succinctly: "For an average fabless semiconductor customer using our 300-mm line, a wafer lot is anywhere from three to seven wafers."

Seems there's not a lot of wafers in a wafer lot these days.

Our whole approach was based on the assumption-true so far-that chip failures were dominated by defects," Billat explained. "But now it is fabrication that dominates yield, not defect density. This will require us to forge a link between design and test.

Somebody should be telling Yousef about this concept -- but I'm not the one.

eetimes.com

Buss said CMOS scaling will continue to offer performance, density and cost advantages for the next decade, but that CMOS will run out of steam by 2012 when gate lengths are at 10 nanometers, or 0.01 microns. "By CMOS, I include all of the double-gate structures," he said. "My guess is that by then we will be using a dual-gate FinFET," he said.
.
.
Also, the industry must put more funding into 3-D structures, in which logic devices, memory, sensors, and chip-to-chip optical interconnects would be stacked and connected vertically in a single package.


Looks like this guy thinks basic physics isn't going to be a problem for a while, but there will have to be some difficult process engineering and design work.

tgptndr



To: Dan3 who wrote (80366)5/21/2002 1:26:44 PM
From: WindsockRead Replies (2) | Respond to of 275872
 
AMD powered HP notebooks in mass shut down

theinquirer.net

Pavilions go on strike, randomly
By Adamson Rust, 21/05/2002 09:45:20 BST

HUNDREDS OF USERS are complaining that an HP notebook – the Pavilion n5470 has taken to shutting down without notice and throwing people's work into disarray.
One user who bought the machine told the INQUIRER today that he has a Pavilion and it randomly decides to go on strike at least 10 times a day.

Users who are up in arms have bombarded HP's business forums with complaints but the problem still appears to await resolution.

The first complaint started towards the end of last year, but there are still complaints being filed, with no apparent result.

notebooks.hp-at-home.com

hp pavilion n5470

• The AMD Athlon™ 4 processor 1.0GHz handles today's computing tasks while leaving the door open for tomorrow's technologies