Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: wanna_bmw who wrote (84759)	7/12/2002 4:24:20 PM
From: Dan3	Read Replies (1) \| Respond to of 275872

He got you. According to that link, Intel is starting about 100K 8" wafer equivalents per week around now (they were at 78K a year ago, before the new 12" FABs came on line). If 2/3's are for CPUs (which are a lot more than 2/3's of revenue) then Intel is producing 30 million or so CPUs per quarter from 1.3 million wafers. Which works out to about 23 good chips per wafer. Man, those big P4 dice are a pain to FAB, eh?

To: wanna_bmw who wrote (84759)	7/12/2002 4:40:38 PM
From: Petz	Read Replies (2) \| Respond to of 275872

you are comparing future wafer starts and future CPU sales projections to current yields. Huh? The TSMC numbers were for 2002. They said TSMC is expected to raise its total monthly capacity to 381,000 8-inch-equivalent wafers at the end of the year from 332,000 at the end of March. In other words, the 332,000 is an actual number for March 2002, 381,000 is a projection for 12/02. And presumably they'll raise it another 20% so that sometime between mid 03 and mid 04 they will catch Hynix. You don't even know how many wafer starts out of Intel's current 75k wspw worth of conceivable fab space are actually being used for production CPUs. Based on the TSMC numbers, current capacity is a little higher, more like 80K wspw, but thats a minor quibble. And I said that only 60% of "conceivable fab space" was being used for production CPUs. Now, Intel might not be running this space at 100% capacity. If they are running at 2/3 capacity and they sell 130M CPUs in 2002 (4x the rate of Q1, which is usually above Q2, equal to Q3 but below Q4), the Good Die Per Wafer (GDPW) is (130M sellable CPUs)/(80K wspw x 2/3 utilization rate x 0.6 fraction used for CPUs x 52 weeks) = 78 sellable CPUs per wafer, running at 2/3 capacity. Close to the number you get if you do the calculation for AMD. Still, less than 50% yield and not "world class" according to Elmer. Petz