Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: TGPTNDR who wrote (85300)	7/18/2002 11:33:03 AM
From: combjelly	Respond to of 275872

"So much for wbmw's carping on the necessity of Hammer redesign for memory generational changes." Maybe. But, considering that much of the pipeline seems to be tightly bound to the internal memory controller, using an external memory controller has the potential for "interesting" side effects.

To: TGPTNDR who wrote (85300)	7/18/2002 12:13:35 PM
From: wanna_bmw	Read Replies (1) \| Respond to of 275872

tgp, Re: "AMD SAYS THE INTEGRATED memory controller on its forthcoming Hammer chips can be turned off, allowing the chips to use the controller of its accompanying chipset if necessary." That's not ideal, either. You gain bandwidth, but lose latency. I see the possibility of some benchmarks running faster on AMD's integrated DDR333 controller, than a 3rd party's DDR-II 400/533 controller. It might be good from a marketing point of view to have DDR-II based Hammer systems, but IMO, Hammer would be losing its greatest advantage. wbmw