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To: wanna_bmw who wrote (86198)8/1/2002 4:07:11 PM
From: ElmerRespond to of 275872
 
I don't believe you[Petz] are an expert in this field, so why should your opinion count for anything?

Did you forget which thread this is?

EP



To: wanna_bmw who wrote (86198)8/1/2002 4:36:35 PM
From: PetzRead Replies (1) | Respond to of 275872
 
EDITED<<There is no way on earth that a reliable 16-level cell (4 bits) can be made>>

<And why not?? I don't believe you are an expert in this field>

Its an analog technology, so it is 4 times more difficult to double the bits in a cell. Furthermore it gets worse as the feature size (and voltage) get lower. Finally, the decoders (voltage level comparators) would be much slower for 4 bits than for 2.

OTOH, imagine the going from 2 bits per cell to 4 bits per cell in a 2-dimensional area, where each "bit" occupies a different 2-d position. You can double the number of bits and only bring the charges 29% closer to eachother (0.707 x). As I recall, the Saifun method might even use the vertical dimension, in which case doubling the bits has even less effect.

This is a gross simplification, but I am 100% confident that if Intel succeeds in making a 4-bit cell, they will not do it with the same brute-force analog technique. The clock is ticking.

AMD's mirror-bit white paper: amd.com

Petz