As 157 nm sinks, immersion makes a big splash
By David Lammers
Silicon Strategies
07/19/2004, 9:00 AM ET
San Francisco — Neither summer heat nor vacation dreams made water the popular theme of Semicon West last week. Rather, it was immersion lithography that had swimming goggles being passed out at ASM Lithography's booth and prompting every self-respecting marketer to moisten his Powerpoint deck with surfing photos.
Immersion lithography tools will soon move to the test phase on fab floors, just in time to get the chip industry out of the tight spot created by the failure of 157-nanometer lithography development programs.
"We are more than happy that immersion will be there for us at the 45-nanometer node," said Hans Stork, chief technology officer at Texas Instruments Inc.
Water is playing the role that copper took on at Semicon West five years ago, when the industry began to transition from aluminum to copper interconnects, and the burnished metal adorned the show floor booths of companies hawking electroplating and deposition equipment.
Just as copper posed a serious integration challenge, bedeviling early adopters with unforeseen "gotchas," immersion too will present new defects for the industry to overcome, Semicon West participants said last week.
ASM Lithography (Veldhoven, Netherlands) has been operating an immersion research tool, the 1150i, in Holland, where 16 chip makers so far have run 10,000 test wafers. By the end of September or early October, said Paul van Attekum, senior vice president of product marketing, ASML plans to ship a 1250i scanner to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan), with 1250i shipments following later this year to "several" leading-edge chip makers and to Interuniversity Microelectronics Center (IMEC; Leuven, Belgium), the research consortium.
With a 0.85 numerical aperture (NA) lens, TSMC plans to use the "wet" 1250i scanner for testing, as well as early commercial production, of logic devices at 65-nm design rules.
Burn Lin, senior director of micropatterning at TSMC, said the film of pure water that immersion lithography places between a projection lens and a wafer "more than doubles" the depth of field. Speaking at a seminar on immersion lithography organized by DNS Electronics LLC, a subsidiary of Dai Nippon Screen (Kyoto, Japan), Lin said that in one test TSMC achieved a depth of field of 125 nm with a "dry" 193 tool and 280 nm with a wet 193 scanner.
Immersion lithography may offer designers some relief from the nettlesome problem of forbidden pitches, Lin said. Those pitches are caused by destructive interference from subresolution assist features widely used on masks for critical layers, such as contact holes in the interconnect stack.
TSMC researchers worked with a 65-nm process with wiring pitches of 130 nm (P1), 162 nm (P2) and 195 nm (P3). "If we could eliminate P3 [by using immersion scanners], we could use cheaper phase-shift masks" for critical pattern layers, said Lin, who pioneered the immersion field while working at IBM's research division.
That would be welcome news. Patrick Martin, director of core technology development at Photronics Inc. (Brookfield, Conn.), estimated that mask costs for the 45-nm node, where immersion lithography is expected to be widely used, will be 2.5x to 3x more expensive than masks for a 90-nm process. "Having a single [193-nm]-wavelength solution through 2009 will allow for simplification," Martin said.
Lin speculated several times on the cost advantages of using immersion to extend the life of existing 248-nm tools, noting that the 248 lenses are much less expensive and that krypton-fluoride lasers are less expensive to operate than the 193 scanners based on an argon-fluoride laser. TSMC may already have placed orders for 248-nm immersion tools, a source said.
But scanner vendors want to sell 193 immersion tools. Van Attekum said "immersion for [248-nm] KrF is much more financially risky for us than for ArF."
The wet 193 tools will not be cheap, selling in the $20 million to $30 million range. Van Attekum estimated that immersion adds 10 percent to the price. Still, immersion 193 tools will be much less expensive than the estimates floating around for EUV, or the now all-but-defunct 157-nm program.
By the third quarter of next year, ASML plans a wet version of its recently announced 1400 series scanner. With a numerical aperture of 0.93, the dry 1400 begins shipping Dec. 31, 2004, and customers can later buy a conversion process to change the dry 1400 to a wet scanner with a different lens. The 1400i will compete with immersion tools from Nikon and Canon, which are also preparing immersion lenses with NAs in the 1.0 range for 2005 introduction.
At TI, chief technology officer Stork said the company will not buy a 1250i scanner, relying on IMEC's machine to do its early immersion development. TI plans to buy either the 1400i, or a 1700 series ASML scanner with an even higher numerical aperture, for use at the 45-nm node.
TI plans to install its first immersion tools at a 45-nm process development line by early 2006, and to have immersion in production by January 2008 at one of its 300-mm fabs in the Dallas area.
Though the major target is the 45-nm node, "there is a possibility we may use immersion at the 65-nm node for enhancements," Stork said.
Defects introduced by contamination of the resists, bubbles and other yet-to-be-discovered hazards are likely to engage process engineers for several years. "The defectivity parameters will change with immersion, as they always do when a major process change occurs," Stork said. "Those will be a hindrance to getting the full value of immersion early on, but defectivity has never been a major long-term stumbling block."
"Until the chip industry gets immersion scanners with tracks [machines that clean and coat the wafers with resists] running large volumes of wafers, it will be difficult to find and categorize defects," said Jeffrey Johnson, a vice president at Sumika Electronic Materials Inc., the U.S. subsidiary of Sumitomo Chemical Co.
For two years, Johnson said, his colleagues have been studying the interactions between resists and water. Certain materials quickly leach from the resist into the water, causing resist manufacturers to adapt their resist chemistries. "We know how to create immersion resists," Johnson said. "But the No. 1 question facing the industry is defectivity. The chip industry has a long history of struggling with defects in lithography," he said.
One "open question," Johnson said, is whether immersion resists will need a topcoat to protect the resist from leaching. A topcoat adds cost and must be removed by solvents in a cleaning step that also adds to the cost of the track. "Topcoats may be a fallback option" if problems develop in immersion resists, he said. |
