Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: combjelly who wrote (133651)	9/23/2004 10:30:36 PM
From: Dan3	Read Replies (2) \| Respond to of 275872

Re: The fact that AMD is still producing their fastest chips on 130nm isn't a cause for concern, that always happens. Actually, shrinks used to produce much faster and cooler parts right off the bat. I think it's clear that all scaling has ended and the industry is going to be frozen right where it is from now until the end of time. The wall has been hit. So we're stuck right where we are now with AMD having about 25% better performance than Intel and AMD also using about 25% less power. And it will stay frozen just like this forever. No wonder why Hector's shopping around for more FAB space. :-)

To: combjelly who wrote (133651)	9/23/2004 11:25:44 PM
From: dougSF30	Read Replies (1) \| Respond to of 275872

AMD did not "pull in" Palermo. These Nov 1 90nm Semprons are castrated Winchesters, instead of the castrated Newcastles shipping now as the 3100+. Doug

To: combjelly who wrote (133651)	9/24/2004 4:55:34 AM
From: TGPTNDR	Read Replies (1) \| Respond to of 275872

CJ. Re: <I don't think static leakage in the caches is the answer. If so, then the 35 watt mobile chips wouldn't exist.> Forgive me if I'm wrong, but is there such a thing as 'static leakage' in cache? Doesn't cache refresh at chip clock rate, or some constant divisor, making power consumption some function of clock rate -- even in the absence of moving data around? (I haven't made it to chapter 8 yet.) Re: <So if they can't get a premium for faster chips, they might as milk what they can out of 90nm. Or some combination of both. Or neither.> I'm of the opinion that AMD is trying to sell it's chips to maximize total revenue over time. But you also learn by doing and so install new processes with the full knowledge that initially they will be less productive -- in $ terms -- than the prior generation. To me the Sempron 3100+ indicates current 90Nm production is inefficient for both top end and mobile in quantity (or they've maxed-out mobile sales). I guess I can't have a problem with that. This is, after all, practice on a large scale. I took introduction of 90Nm first in mobile as an indication that power, not clock, was first scaling criteria for the generation. I think I'd like to see what happens if one runs a 3100+ at mobile clock rates. But I think I'd bet that if they cut the rate of the L2 power consumption would drop substantialll. -tgp