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To: Hans de Vries who wrote (197178)	5/16/2006 8:07:57 PM
From: dougSF30	Read Replies (1) \| Respond to of 275872

It doesn't usually work out to 50% in the shrink-- usually a little higher. For example: 130nm (193mm^2) to 90nm (114mm^2) is just under 60%. Also, I don't think that image is an actual die photo even though parts of it are. So I think relative scale may be off, etc.

To: Hans de Vries who wrote (197178)	5/16/2006 10:49:27 PM
From: eracer	Read Replies (3) \| Respond to of 275872

Re: 150 mm2 is about the same size (+7%) as Core 2 Duo which has 140 mm2 Very impressive if true. Anything under 200mm would be good. It appears AMD will have L2 cache density close to that of Intel CPUs.

To: Hans de Vries who wrote (197178)	5/16/2006 11:22:17 PM
From: Joe NYC	Respond to of 275872

Hans, The quad K8L looks great. BTW, where did you get Ref F picture? I haven't seen it released anywhere. A few things that are a little puzzling to me are: - We know that the upcoming part is Revision F. Do you know for sure that K8L is Rev G? The reason I ask is that the progression of revisions was: C - last 130nm, D - 90nm shrink, E - 90nm with enhancements. What I am getting to is that the shrink had its own stepping D. What revision/stepping is the 65nm shrink (which seems to have a codename Brisbane)? - the area between cores of the quad core K8L seems kind of long. Too long for there to be DC K8L. Unless there DC is just the upper part + the middle area with - what is the middle area? Part of it must be the memory controller, but it is very large. What's taking all that space? David Kanter mentions "better coherency", which could be candidate for some extra silicon. BTW, I was hoping that QC would reduce the cache size to 512K while adding L3. Higher density is a nice bonus. Joe