Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: NicoV who wrote (198199)	5/21/2006 4:21:25 AM
From: Joe NYC	Read Replies (2) \| Respond to of 275872

Nico, I think the bottom 2 speed grade will be for low power consumption. As far as top bins, if Intel is using the same die for Woodcrest as Conroe, there should be a lot of parts from which to cherry pick higher speed grades. Joe

To: NicoV who wrote (198199)	5/21/2006 8:56:58 AM
From: eracer	Read Replies (1) \| Respond to of 275872

Re: I wonder why INTC release such a large range of frequencies...Looking back to the launch of Opteron, how much would have been the demand for 800MHz, 1 GHz and 1.2 GHz Opterons? Why would Intel not challenge AMD at the low-end? The 1.6GHz Woodcrest should be as fast or faster than AMD's Opteron x65 and it is priced lower. Basically the low-end of the Woodcrest line is the equivalent of AMD launching Opteron at 1.4, 1.6, and 1.8GHz while the faster Woodcrests would be the equivalent of AMD Opteron launch speeds of 2.0, 2.2 and 2.4GHz.

To: NicoV who wrote (198199)	5/21/2006 9:09:39 AM
From: combjelly	Read Replies (2) \| Respond to of 275872

"Assuming that it is true (for whatever reason) that there is a flat yield curve, what are the consequences?" There are some reasons why it could be true. Apparently, there are growing number of factors that affect bin splits as geometries shrink. And those factors can vary from lot to lot and even wafer to wafer. Without something like APM, you get a high degree of variance and a lot of low clocking processors. So "copy exact" might have reached the end of the line.

To: NicoV who wrote (198199)	5/22/2006 4:48:36 AM
From: Rink	Read Replies (1) \| Respond to of 275872

re: For the last few quarters, AMD has been very capacity constrained. That means that they must have turned all process variables towards high yields, sacrificing high speed. They may even have stopped using their stress mechanism if it would sacrifice yields. Sorry but I think that is BS. AMD might have delayed using new additional SiGe stain (additional to current DSL strain) to 65nm because of it (unlikely but possible from my point of view), but I believe there's no chance whatsoever that they stopped using DSL at any moment last couple of quarters. I don't think it work that way. It would have meant producing chips a couple of revs back, and we haven't seen evidence of that. Also performance and power advantages of DSL are very significant. Regards, Rink