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Technology Stocks : ASML Holding NV -- Ignore unavailable to you. Want to Upgrade?

To: niek who wrote (1277)	10/20/2006 1:41:05 PM
From: niek	Read Replies (1) \| Respond to of 43499

IMEC: Double-patterning immersion works for 32nm October 19, 2006 Solid State Technology IMEC and ASML claim they've proven that double-patterning 193nm immersion lithography (NA=1.2) can be a viable interim solution -- at least technically -- for flash and logic manufacturing at the 32nm node, until extreme-ultraviolet (EUV) lithography achieves production-ready levels. The "very promising results" involved splitting gate levels of 32nm half-pitch flash cells as well as logic cells in two complementary designs, and receiving optical proximity corrections and a classical "litho-etch-litho-etch" approach, according to IMEC. ASML's XT:1700i immersion scanner, delivered in late September and is expected to be accepted later this month, will be "the workhorse" for the double-patterning work. Future research will focus on improving the overlay to make the process reproducible. Meanwhile, IMEC claims it has made "significant progress" with ASML's EUV alpha demo tool, delivered in mid-August, with work ongoing to integrate the Carl Zeiss projection optics box and Philips Extreme UV light source (since identified as a low-power xenon source, rather than tin). A TEL Clean Track Act12 is also under installation.