Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: economaniack who wrote (219868)	12/10/2006 12:04:34 AM
From: dougSF30	Read Replies (1) \| Respond to of 275872

and claim that per wafer good die yields are higher on the new process than the old Yeah, yields as in the NUMBER of good die, not the FRACTION. Which makes the claim rather pathetic, as it could be true with 65nm yields (used in the usual sense) only 68% the level of 90nm yields.

To: economaniack who wrote (219868)	12/10/2006 12:37:22 AM
From: Sarmad Y. Hermiz	Read Replies (2) \| Respond to of 275872

e, I understand your point of view. I think you are implicitly under-estimating the usual speed at which a process has to be up and running at high yields - in order to be economically viable. But forget that. I think there is a more relevant set of factors to discuss. From reading, I understand that a fully utilized 300mm 65nm process fab can have a 40% advantage in per piece cost over a 200mm 90 nm fab. But the magic words here are "fully utilized". And I think there is an implied assumption that a 65 nm part has the usual shrink factor (close to 55% of the 90 nm part). And also that the yield (in % good die from the wafer) is similar to the 90 nm parts. There is further the assumption that the 65 nm parts are of equal quality and ASP compared to 90 nm parts. I think even though you did not state these factors explicitly, they have to be at the foundation of your optimism for AMD's transition to 65 nm. I think AMD's 65 nm parts are not meeting the assumptions that are normally expected from a shrink. We know what these shortcomings are. 1) fab 36 is not fully utilized yet. Certainly not at 65 nm. 2) the 65 nm parts are not binning as high as the 90 nm parts, and therefor will fetch lower ASP. 3) (doug's favorite) the shrink is not as small as usual, leading to higher cost than ideal. 4) possibly - no one here knows - the low clock bins might imply lower than usual yield. I do appreciate the primer on design -> production process. But I think the factors I outlined are more relevant to whether AMD will clobber Intel or not. Sarmad