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To: Elmer Phud who wrote (220075)	12/11/2006 7:23:50 PM
From: kpf	Read Replies (1) \| Respond to of 275872

elmer It appears he's implying that yield numbers don't reflect the effects of intra-die variation as well as inter-die variation. I did not understand him so. I believe where he was getting at is there is more and more dies basically functional, but not passing final checks anyway - for the reasons of intra-die variations which just do not allow to sell it. I try to explain the little I believe to have understood of it for SRAM: You need six transistors per cell. They might be all working, but you can only use them to store memory if variations of threshold-voltages of the six are within a tolerance. If they are all 0,5 plusminus 0,1, good. If they are all 0,6 plusminus 0,1, good as well. Good so far. But then you have an array of such cells, with maybe each cell working, but variation does not allow using the array because some cells are 0,6 +- 0,1 and some are 0,5 +- 0,1, because there is no common supply voltage to allow for reliable operation of all cells. I am mentioning this (very simplified) example because there was an article posted here today I did not read on after "SRAM is... easy to build" in the first paragraph. You know well threshold voltage is just one parameter. There is many more where variation is a problem. Maybe Ali could further clarify if i missed where he was getting at. Oh, and certainly you try to tackle these problems in dfm-conceptializations. :) K.

To: Elmer Phud who wrote (220075)	12/12/2006 2:57:15 AM
From: Ali Chen	Read Replies (1) \| Respond to of 275872

"It appears he's implying that yield numbers don't reflect the effects of intra-die variation as well as inter-die variation. Note the terms intra and inter. The only way that could happen is if you couldn't determine the intra and inter die variation. That's just not the case. You certainly can. So while yield numbers don't tell you the actual binsplit information in a single number, they still reflect the number of saleable die, or at least to a very high probability." It is amazing how hard is to communicate even simplest things. I am sure I said many times that I am talking about "sellable dies", while you again and again misspell it as "sealble die" :-). Sealable != sellable. Combjelly also told you this. Someone on this thread was bragging about how wonderfully overclockable the current Intel processors are. Yet they are still selling 1.6 GHz chips while amateurs can overclock certain samples to what? 5 HGz? Actually, I don't care much whether do you find ways to downbin dies at wafer sort, or after packaging. The fact remains that the clock of finished sub-100nm chips is severely handicapped, and indications are that it is due to ever growing variability of individual transistors within the same die. In other words, yield numbers are made up by shifting to frequencies about 1/3 of chip potential, by binning dies into half-cache chips, into half-fsb chips, and crippled Celerons. The point I was trying to make in my original remark is that there is no need to pretend that you know much more, that you are under some NDA, etc, and hide behind vague scary phrases about "revealing issues that reveals something that reveals itself...". It is a known problem, with factual support. That's it. - Ali