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To: Rink who wrote (230025)4/15/2007 1:18:44 PM
From: pgerassiRead Replies (2) | Respond to of 275872
 
Dear Rink:

The advantage for double patterning is that it can be done with existing 65nm equipment at the cost of wafer throughput and edge definition, If Intel wasn't accurate in wafer positioning, it would even be worse use double patterning. Intel has to fo 7 steps for every 45nm mask needed to immersion's one. As you can see, it wouldn't take many 45nm mask steps to make Imtel's production line output crawl. And each step produces yield loss, so Intel takes a big hit there,

All that to save 2 quarters of production start delay.

Pete