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To: pgerassi who wrote (248683)	3/12/2008 5:42:52 PM
From: chipguy	Read Replies (1) \| Respond to of 275872

If you would have read the document, row spares and column spares become lower with bigger macros, not more of them. Nice strawman, I didn't make the claim you are attributing to me. Once again you demonstrate that you either fail to fully read my posts or actually comprehend them. Your IBM reference does a nice job of showing how ridiculous your claim that having both row and column redundancy in memory is "rare". IBM used it in their Power6 L1D arrays, a small memory highly pressed for speed and representing an extremely tiny portion of the overall die area. Yeah, real rare. ;^)