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To: mas_ who wrote (252877)	6/5/2008 3:11:10 PM
From: dougSF30	Read Replies (2) \| Respond to of 275872

Penryn's cache is a work of art and won't be rivalled[sic] for some time. mas, just more unsubstantiated claims from you. prefetching does not "only work for non-random patterns". It does not "work" or "not work", but rather works better the more uniform the access pattern is. You are confusing main-memory prefetching with inter-level cache fetching when you talk about disabling prefetching for certain FSB-constrained benchmarks on Penryn. The "numbers" do not tell the whole story precisely because they do not reveal all the details of how the L1 & L2 are fed from the L3 & memory in Nehalem vs. Penryn. (In addition to the fact that they may not be final "numbers" at all.) Yet again you make blanket claims based on inadequate data.

To: mas_ who wrote (252877)	6/5/2008 3:13:42 PM
From: dougSF30	Read Replies (1) \| Respond to of 275872

However you take a hit on single-thread as does Barcelona, Don't assume that just because Barcelona is a piece of junk, that Intel's cache system needs to be. You can already see that Intel's 4x larger L3 is 50% faster than Barc's L3, using alpha-silicon "numbers"