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Technology Stocks : IDTI - an IC Play on Growth Markets -- Ignore unavailable to you. Want to Upgrade?

To: Hippieslayer who wrote (4878)	11/21/1997 10:30:00 PM
From: flickerful	Read Replies (1) \| Respond to of 11555

thanks for the link to the BYTE "Chip Conference Board". i checked the index, and along with the winchip discussion, i saw some centaur comments ( by the same two contributors). actually, there are several worthwhile issues discussed there... here's a link to one of the centaur remarks: dev4.byte.com

To: Hippieslayer who wrote (4878)	11/22/1997 2:34:00 PM
From: Rob S.	Read Replies (3) \| Respond to of 11555

Great digging. This adds a bit and falls in line with the threads understanding of the C6. This emphasizes the importance of ramping the C6 as quickly as posible and why this is likely to have an impact with analysts and the stock price. Here's a statement I find interesting: The new 0.25-micron die would be so tiny that it would be pad-bound, so Centaur is adding an integrated L2 cache -- 256 KB, eight-way set-associative. It will retain the 32-KB L1 instruction cache and 32-KB L1 data cache already found on today's WinChips. The Hillsboro fab is supposed to be doing pilot runs of the 0.25 micron shrink. What is interesting is that they are going to add the integrated L2 cache - apparently before the C6+ version comes out. What is meant by the chip being "pad-bound" is that to create the needed I/O, power, control, etc. pads to connect to other chips via the circuit board, they need to expand the size of the chip to fit them. That makes putting the L2 cache on-chip "free" as far as chip real-estate is concerned. This is where the synergy between IDT and Centaur should be realy profitable. IDT has some of the most advanced memory technology on the planet and should be able to do a super job of putting advanced architectures on-chip. I don't know the technical issues well enough to know for sure, but it's posible that IDT can use Fusion or other advanced cell and addressing technology to put more SRAM in far less space than it's competitors. If IDT can keep the size of the overal C6 down well below it's competitors as it moves to higher integration of L2 and graphics, etc., then the impact will be tremendous.