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To: greg nus who wrote (2715)	12/5/1997 2:11:00 PM
From: Petz	Read Replies (1) \| Respond to of 6843

greg, PMFJI, but Paul Engel on the Intel thread used a "burdened" cost of $2000 per 8" (200mm) wafer. I think only $900 of this is the actual wafer cost. (BTW, don't think AMD is using 12" yet.) This includes all the variable costs of production such as labor, chemicals, disposal costs, etc, but not the fixed costs like depreciation which don't vary with output. Costs for a 5-layer process like AMD's are probably proportionately higher, so $2500 per wafer would be safe. An 8" wafer has 31400 mm sq area, probably 10% wasted on edges = 28260 useable area. Here are die sizes: K6 (0.35 um): 162 mm sq (174 candidates, probably less -- more waste on edges) K6 (0.25 um): 68 mm sq (415 candidates) K6-3D (0.25 um): 81 mm sq (348 candidates) Make it Better Petz

To: greg nus who wrote (2715)	12/5/1997 2:56:00 PM
From: Brian Hutcheson	Read Replies (1) \| Respond to of 6843

amd.com Hi Greg how the food at Mamma Lina's Italian restaurant ? the above URL states that Fab 25 has 6000 wafers per week capability on .35 , you can probably factor in some reduction for .25 but not sure how much . SDC has a 1000 wafer/week on .25 . I would think that Fab25 would be at least 3x that at 3000 (being conservative). Which would give total of 4000 wafers/week . Before someone says that SDC is a development lab only , given the CC statement that AMD intends to produce K6 beyond their apparent resources it would not make any sense that SDC would not be used for production K6s . One unknown factor is , how many .25 K6s will have been produced and shipped in Q4 . This is an important factor since their ASP should be appreciably higher . I am not sure of 300mm fab cost , but given the overbuilding of FABS in other semi areas and the total potential capacity on just .25 Fabs I wonder if this is an area that chip makers have to be wary of . It is more important to go to .18 m I would think .