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To: neolib who wrote (31511)	7/30/2019 6:29:30 PM
From: Doug M.	Read Replies (1) \| Respond to of 73258

Any qualification delay (beyond what might have already taken place) surely must be behind them if they're confident in their Q4 revenue numbers.

To: neolib who wrote (31511)	7/30/2019 7:12:33 PM
From: Pravin Kamdar	Respond to of 73258

I missed that. It was subtle, but explains a lot. Given the 8/7 Rome launch, whatever they had to work out has been worked out. Problem is (with longer cycle times at TSMC on 7 nm -- which should have been managed) supply is not meeting demand. Having said that, I would rather have a new product sold out with low supply, than available with low supply. Lisa did mention that they are working on supply, but it takes 3 months to get wafers through. I wonder if the issue was not predicting demand, or some kind of wafer constraint -- or lower than expected frequency binning -- where low binned stock piles will soon come to market in lower priced SKUs.