To: Elmer who wrote (4002 ) 1/22/1998 8:49:00 PM From: Adrian Wu Read Replies (1) | Respond to of 6843
Elmer: <Intel is still likely to be well ahead of any Socket7 offering in raw frequency, so the issue is moot.> Once AMD can manufacture the K6-3D reliably with the 0.25 micron process, it will have a cost advantage. The P-II's advantage is in it's "backside bus" architecture. However, this is also it's Archille's heal since it makes it cost more to produce. The slot 1 architecture also makes it so. Don't forget, most of the socket 7 chipsets are Taiwan made, and they have a cost advantage in terms of currency exchange. I bought an FIC 2007 motherboard with 1MB of L2 cache and it costed me HK$1,200 (US$150) in September. The more advanced 2012 with the VP3 chipset is now selling for HK$900. Other brands are even less. The K6 core is actually more advanced than the PII'2. (6-issue RISC with 64KB L1 vs. 5-issue RISC with 32 KB of L1) Even the non-pipelined floating point unit of the K6 will be corrected in the K6-3D with the parallel floating point caculations. Just to convince you, you don't need to run the system bus at 100MHz to prove it. Read this article: anandtech.com By running the K6, 6x86MX, Pentium MMX and PII's L2 cache at 83 MHz and the processor at 166 MHz, one can already see the difference. Without it's L2 cache advantage, the PII on a 440LX board actually performs identically to a Pentium MMX on a VP3-based board (with 512KB L2), and inferior to both the 6x86MX and the K6! This means the release of the cache-less PII will probably turn out to be a major embarassment for Intel, since OEMs can stick to the good ol' Pentium MMX for the same performance or go to a K6 for better performance. And what about chipsets? Will Intel need to release a seperate chipset for this turkey or are they going to stick to the 440LX and run this sucker without an L2 cache? BTW, a 512KB PBSRAM module now cost less then $25. What a dilemma! Adrian