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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Paul Engel who wrote (28076)1/23/1998
From: Elmer  Read Replies (1) | Respond to of 1574468
 
Paul, very good analysis of the situation. You bring up a very significant point that I have never seen addressed. Silicon is outrunning testers. There are only a small handful of vendors of top of the line, state of the art production testers for highspeed ICs like Intel's Pentiums, DEC's Alpha, and to a lesser extent, AMD's K6. They are very expensive and the ability of vendors to meet the demand for new equipment is seriously in question. If Intel and AMD are going to be shipping millions of processors running at many 100s of MHZ and requiring timing resolution and accuracy in the pico seconds, it has a lot of manufacturing people very worried about how they are going to get a reliable tester to use in production. Wouldn't it be ironic if CPU's get so fast they can't be tested anymore? Your mention of BIST is a good example of modern methods. Full and partial scan is another one, but in the end, they still have to run them at their rated speed, unless they are willing to make major compromises in quality. You can't tell a 233mhz K6 from a 200mhz K6 unless you really run them at that speed. The same will be true for a 450mhz vrs a 500mhz.

EP



To: Paul Engel who wrote (28076)1/23/1998 9:46:00 AM
From: Bill Jackson  Read Replies (1) | Respond to of 1574468
 
Paul, I can see some bottlenecks occurring because you are only doubling the speeds, but the number of transistors could be ten times as many.
However if each section self tests rapidly, they can bother to fully test only those in the 'pass all subtest' bin(unless they have some redundant on chip sections to activate with fuse links/wires etc.

I read elsewhere that it is a problem, but solvable.

Bill



To: Paul Engel who wrote (28076)1/23/1998 5:50:00 PM
From: Tony Viola  Read Replies (3) | Respond to of 1574468
 
Paul, re: "Perhaps someone else on this thread can add some insight into the test difficulties with newer
CPU chips?"

I've gotten away from test in the last few years, but last I looked, Teradyne, based in Boston, and Advantest (Japan) were keeping up pretty well with VLSI testing. As you mentioned, BIST has become a necessity. IBM's version is JTAG, and at Amdahl we used "Net Verify" on a recent VLSI based product. In net verify, you use scan to get to a particular gate or latch input, then you clock or pulse it (through scan) and then look for the appropriate gate or latch output to "wiggle". This way, you break down testing even millions of gates worth of logic to millions of different "mini-tests". Keeps the testers (particularly the software!) relatively simple.

It worked good!

Tony