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To: Scumbria who wrote (7139)3/4/1998 11:12:00 AM
From: Rob S.  Read Replies (1) | Respond to of 11555
 
Thanks for a thorough and informed discussion about the C6 and other chip architectures. The Covington points out Intel's realization that market demand has not materialized for incrementally more powerful parts at much higher prices. Here they will take advantage of their marketing clout to push off a less capable stop-gap part on the "sub zero" (sub $1000) market. Isn't Intel planning to come out with a successor to Covington that will have a backside on-chip L2 catch?



To: Scumbria who wrote (7139)3/4/1998 12:13:00 PM
From: Cicero  Respond to of 11555
 
Well, I did read that document and if I had been thinking a little more logically, I would have seen the implication of translating the instructions.

BTW, this was on the Centaur Site (http://www.Winchip.com)
"The internal architecture and design of the IDT
WinChip C6 is very different from that of the Pentium
processor and other contemporary x86 processors such as the
AMD-K6 and Cyrix 6x86MX."

I was aware of the much larger cache, as well as the cache sizes of the other chips, I know Centaur made a huge deal about it.

I do also recall that id did stray from FP when making Quake II (the cause of several problems if I recall, one of which precipitated the first patch) but other true 3D games still use the FP unit. The only other applications that use it heavily, are CAD and 3D rendering, but while Quake's makers are trying to stray from FPs, the other 3D game designers don't have several engines beneath their belt, and will most likely use the much simpler (on a human scale) FPs for their engine...(I am assuming here which can be dangerous, but I do know that several hardware sites specifically test game performance and attribute bad performance to the FPUs of chips like the 6x86 and the C6)

Cicero