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Technology Stocks : General Lithography -- Ignore unavailable to you. Want to Upgrade?

To: Crossy who wrote (873)	3/10/1998 9:21:00 AM
From: Andrew Vance	Read Replies (2) \| Respond to of 1305

I am still gathering information because of terminology. First, silicon wafers are made "pure". They have a seed crystal from which the ingot is formed and then the wafers sliced. I beleive FERO is a supplier of these crystal seeds. 2. The wafers have a specific crystal orientation for use in certain applications. This gets to be very complicated and goes back to your math courses dealing with the intersection of 3 planes. These orientations need to be tightly controlled, especially for future MEMS production. However, the crystal orientation plays a role in IC functionality. 3. All wafers should have a denuded zone that is thermally created and I believe that a certain resistivity for the wafer is also created for device performance. Therefore, we really do not have "purity" since we do specify the restivity desired for the incoming material. 4. Key words used are "semiconductors" which take advantage of some of the impurities inherent and created within the silicon to achieve device perfromance. 5. The isotopically "pure" silicon would be a waste of time to do for the entire wafer for two reasons. First, I believe it will be a more expensive raw material to create, use, or grow. Remember, you create a seed crystal of this isotope then have to dip it into a huge vat of the molten isotope to grow the crystal into the ingot. Second, at the 200mm and 300mm wafer sizes, a vast majority of the wafer is never used. Best way to describe it is a sheet cake with decorative icing. With all its baking defects, putting Happy Birthday directly on the cake would not look real good. By placing a layer of icing on the cake you cover all the defects, smooth out the underlying cake defects, and create a perfect surface to write your message. Look at the IC device in the same way. The message is the IC structures while the icing is the 3D created feature and electrically activated device structures. The cake itself is nothing more than a repository for certain gettered inperfections, a foundation on which the IC can be mounted into a package, etc and a platform to be abused by the heat, chemicals, and human disturbances that occur. Again, think of it as the bottom of the cake. It gets no icing, holds the cake upright, allows it to be transported in the box, and protects the icing. 6. It is the impurities that we induce into the silicon through all the IC manufacturing processes that gives the devices their electrical perfomance characteristics. It is at this point that I must defer to further research. Inherently it seems that an ultra pure epi type layer of the isotope would be the ultimate starting material. However, I do not see the benefits yet since we will just have to add impurities to get the structures we want. I would think we are talking about negligible resistivity thereby making the wafer nonconducting(???) or insulated. This means further processing. However, starting from scratch has its advantages. Also, this purity thing has not addressed the crystal defect issues that occasionally occur with the non isotope. How will they prevent "slips" from occurring. This is where I break down and need to get more data and information. Any links you have might help in this endeavor since I am a lithographer by trade. the stuff I am speaking about on this subject are more in line with a Diffusion, Thin Film, or Device Engineer's expertise. I am gathering that expertise but some of them do not even know what I am referring to. Andrew BTW-As device structures shrink towards the atomic level, I can see the use and need for an isotopically pure epi layer to build the electrical structures but never the need for the entire wafer to be built that way. As feature sizes get smaller, the implants, diffusions, and other types on injected impurities sometimes go shallower into the wafer.