Do the numbers
>>Rambus Inc., Mountain View, Calif., will report today that chips designed using its Base and Concurrent Rambus DRAM and logic technology have exceeded $1 billion in sales.<<
>>But Geoff Tate, chief executive of Rambus (Mountain View), defended his company's use of royalties, noting that Rambus contributes $20 in value to a Nintendo 64 system but receives less than $1.<<
>>Despite the obstacles, no one at the conference disputed the compelling need for commercial IP. A new market forecast from HTE Research (San Francisco) estimated that the IP market is growing at an annual rate of 100 percent and will reach $1.4 billion by 1999.<<
IP98 forum exposes struggling industry -- Undefined business models, unstable core prices cited
By Richard Goering
Santa Clara, Calif. - Despite the rapid advent of systems-on-silicon, last week's IP98 Conference revealed an immature industry that's groping for tools to tackle business and legal challenges.
While technical hurdles such as verification and test need solutions, it's the business-model issues that are commanding the most attention. Today's cores come with a confusing array of licensing and pricing options, raise legal issues, such as patent indemnification, and lack adequate protection against software piracy.
Moreover, the nascent third- party IP business faces a potential collapse through a quick devaluation of cores, some observers said. That could happen if silicon manufacturers give free access to cores.
"The IP business model isn't working," said Gary Smith, an analyst at Dataquest Inc. (San Jose, Calif.), as he introduced an IP98 panel. "There's nothing wrong with the business; we just have to find a model that works."
Andy Graham, president of the Silicon Integration Initiative (SI2; Austin, Texas), commented at another panel that there is no viable IP "infrastructure." What's needed, he said, are standards, licensing conventions, legal protection, vendor qualification, customer support and a marketing channel.
The role of EDA and ASIC vendors is muddled and is growing combative. Cadence Design Systems (San Jose) took some heat for its move into chip-integration services at one panel, where John Danne, executive vice president at LSI Logic (Milpitas, Calif.), warned that EDA companies should not become ASIC vendors.
At an IP98 keynote, Wilfred Corrigan, chairman and chief executive officer of LSI Logic (Milpitas, Calif.), likened the EDA industry to a railroad system that hasn't agreed on the gauge of the track. He challenged EDA vendors to come up with better tools. But Aart de Geus, president and chief executive officer of Synopsys (Mountain View, Calif.), said the real problem is one of methodology, which is a joint responsibility with ASIC companies.
Despite the obstacles, no one at the conference disputed the compelling need for commercial IP. A new market forecast from HTE Research (San Francisco) estimated that the IP market is growing at an annual rate of 100 percent and will reach $1.4 billion by 1999.
Perhaps the biggest potential challenge to IP providers is a rapid decline in prices. The drop may have already already begun: Smith told of a USB core that initially fetched $250,000 in royalties but was down to a $20,000 initial purchase with no royalties within a year.
"The effect of devaluation on the IP market should not be underestimated," said Philippe Delforge, head of IP business operations for Alcatel Microelectronics. "There is a risk that the IP market will collapse because large silicon manufacturers start to give free access to their IP with the sole purpose of winning the silicon bidding war."
Delforge said the industry is divided into two strata: high-value, low-volume IP, such as that in leading-edge cores, and low-value, high-volume IP, found in "commodity" cores. It's the latter category that is at risk if silicon manufacturers choose to lower non-recurring engineering (NRE) costs by giving away intellectual property, he said.
Mark Peryer, technical marketing manager for soft cores at Mentor Graphics Corp. (Wilsonville, Ore.), agreed that average selling prices (ASPs) for cores can rapidly decline. But that's somewhat offset by the fact that mature cores are better understood and require less support, he said.
"If you're building a business model around multiple cores, you can take advantage of early ASPs," he said. "Then it becomes a commodity, but you can increase the complexity of cores."
Regardless of the price of a core, there's considerable debate over how it should be sold. Many IP providers charge royalties, but that's a controversial approach. Tom Anderson, director of engineering for the Virtual Chips unit of Phoenix Technologies (San Jose), commented that customers dislike royalties because they want an "engineer to engineer" business.
Mark Templeton, chief executive of Artisan Components (Sunnyvale, Calif.), warned of the pitfalls of "stacking" royalties. If every IP vendor demands a percentage of the chip's selling price, the chip maker will end up making no money on the product, he said. "Two years from now, there's going to be 30 or 40 pieces of IP on a chip. We can't all get a percentage of the selling price," he said.
But Geoff Tate, chief executive of Rambus (Mountain View), defended his company's use of royalties, noting that Rambus contributes $20 in value to a Nintendo 64 system but receives less than $1.
Stefan Tamme, market development manager at Sican Microelectronics (San Francisco), discussed the pros and cons of various pricing models. These include "pay per IP block," which is a one-time license fee plus royalties; "pay per chip," which is royalty only; and
the "EDA model," which involves an initial license for a binary database.
The consensus that's emerging is that there will be a variety of licensing models. "A single method of IP delivery does not suit everyone," said Doug Ridge, business-development executive at Integrated Silicon Systems Ltd. (Belfast, Northern Ireland)
But several speakers stressed the need for standard license terms and conditions. At the user track, Mark Scheitrum, director of design services for Cadence's multimedia design center, spoke of taking six weeks out of a six-month design cycle to complete negotiations for one USB core.
Other speakers, including SI2's Graham, noted that indemnification from patent litigation is one of the more problematic aspects of license negotiation. There's always a possibility that a core could violate somebody's patent.
Core purchasers typically want full indemnification, said Sican's Tamme, but "IP vendors are not insurance companies."
Another protection issue is IP security. Vendors today rely on nondisclosure agreements, trade-secrets litigation and encryption to guard IP from illegal access or copying.
Sign here
Ken Hodor, product-marketing manager at Actel (San Jose), said "digital signatures" will soon allow people to embed numeric codes inside software. Technology now under development by Miodrag Potkonjak, a professor at the University of California at Los Angeles, lets IP developers add extra connections between nodes in a design. In effect, said Hodor, the designer adds constraints, but with very little performance or area overhead.
Hodor added that antifuse-based FPGAs are by far the hardest device to reverse engineer.
Michel Courtoy, director of marketing at Aptix Corp. (San Jose), said that secure IP distribution is provided by its initiative with Mentor Graphics and Gatefield Corp. Those companies have developed an IP Evaluation Kit in which Mentor's Inventra soft cores are compiled into flash-based GateField FPGAs using an encrypted bit stream and are then placed on an Aptix System Explorer 3. The GateField devices have a mode that prevents the program from being read from the device.
Business and legal problems aren't the only obstacles to effective use of commercial IP. At the user track, Michael Hewitt, member of technical staff at Hughes Network Systems (Germantown, Md.), mentioned a number of problems his company encountered in working with a microprocessor core.
Hewitt cited such problems as synthesis scripts that didn't meet timing requirements, insufficient test vectors and poor access to core I/O. Hughes found some serious bugs in the core, including a multiplier bug that wasn't revealed until silicon came back.
That raises the question of who is responsible for what. "I'm going to have severe penalties if I don't ship product to the customer in the contracted time period," Hewitt said.
Cadence's Scheitrum said his engineers found and fixed "numerous" protocol and specification problems in a USB core that would have resulted in product failure if not caught. But he said commercial IP is steadily improving in quality.
Steven Larky, IC design manager at Anchor Chips (San Diego), related a successful experience using a Synopsys 8051 processor core. But he added that his company decided to develop its own USB core and suggested that users should develop their own IP when they can gain a competitive edge, reuse the block frequently and already possess in-house design knowledge.
The "make or buy" decision was also debated elsewhere at IP98. Mentor's Peryer said a design must be reused at least four times to have a reasonable payback. Anderson of Phoenix said that to be a legitimate core, IP must be usable in multiple applications, have a well-defined interface and come with a host of deliverables. |
