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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Paul Engel who wrote (32464)5/5/1998 7:57:00 PM
From: Kevin K. Spurway  Read Replies (1) | Respond to of 1572207
 
Paul, re: "Bacically, too many caches will cause an INCREASE in data access times for many situations."

If that's the case why have L1 and L2 both on chip? Why not just expand the size of the L1 cache and eliminate the problems with cache checking delays?

Kevin