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To: Ibexx who wrote (55301)	5/9/1998 1:28:00 AM
From: Jeff Fox	Read Replies (3) \| Respond to of 186894

Ibex, re: Katmai is here! I thought I might highlight and comment on this dramatic news in your quoted article. Truly Katmai is on or ahead of schedule and will continue the performance march of Intel processors. Software developers will receive prototypes of "Katmai" processors [this summer] This means mature, debugged silicon; which in turn means A-step silicon already exist and is in Intel labs undergoing through checkout. The chips for the programmers will be either 2nd or 3rd step product - and by this summer no less! along with related software tools this summer Intel will deliver C+ libraries with the chips. This means Intel has already developed the drivers for MMX2 code. Katmai will debut at 500 MHz and move to faster speeds, according to Intel's next CEO Craig Barrett. This shows the headroom in Intel's .25 micron process. In fact Intel's .25 micron process is very likely to be tighter (ie. smaller) in gate oxide and channel length. It is much, much faster than AMD's. Katmai is in the product cycle akin to the 486DX4, meaning it is highly probable to be super optimized for speed. Every critical speed path has been examined and optimized. Critical circuits have been designed by hand where necessary. When Craig says "start at" you can bet that many more higher speed grades await the near future. Katmai will initially use a 100-MHz system bus, but analysts have said that Intel will likely shift toward a 200-MHz system bus shortly thereafter Loddy da dee! Now we're learning what Slot 1 and GTL+ signaling is all about! The Katmai bus can be "double pumped", sending data on each edge of the 100 MHz clock. 200MZ by 8 bytes is 1600Mbytes per second transaction speed. Good luck for any copycat socket 7 system. TTL signaling can't come close to these tolerances. This also means that Katmai will start with the BX chipset and SDRAM initially, then in 1999 move over to Camino chipset with Rambus. so that the new chips will be able to take advantage of the faster memory chips based around technology from Rambus RAMBUS at 800MHz by two bytes is 1600MBytes per second. Funny how these things work out when the subject is Intel Engineering. Wonder where they copied that from? hmmmm cheat answer for AMDites: The answer is nobody! [RAMBUS] which will start to come out in numbers around the same time. Wake up! This is big news here. This means that prototype systems exist already. Would have to to meet such a schedule. Now I wonder who has contracted for all the RAMBUS memory capacity for the first year or so? While the instructions are not set in stone, they are mostly completed. Yeah - and silicon already exist. Must mean that Katmai new instructions can be reprogrammed from BIOS. Hmmm I wonder where I've heard about field patchable microcode before? Well folks - It's time to pay attention to what Intel's been saying about the revenue growth restart in 2H98. You have a big hint here as to what's going to sustain it into 1999. Jeff