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To: Jeff Fox who wrote (55311)	5/9/1998 1:56:00 AM
From: Elmer	Read Replies (1) \| Respond to of 186894

<Loddy da dee! Now we're learning what Slot 1 and GTL+ signaling is all about! The Katmai bus can be "double pumped", sending data on each edge of the 100 MHz clock.> Jeff thanks for all the good comments but this part I think is wrong. The only place I have seen this claim is in EETimes and I think the author just got some wrong information. Katmai will be very fast but I think double pumped frontside bus is still a ways off. EP

To: Jeff Fox who wrote (55311)	5/9/1998 3:04:00 AM
From: Ibexx	Read Replies (2) \| Respond to of 186894

Jeff, As usual, many thanks for your insightful post. I took the liberty of re-posting it on the RMBS thread and hope you wouldn't mind. Regards, Ibexx

To: Jeff Fox who wrote (55311)	5/10/1998 8:43:00 AM
From: Maxwell	Read Replies (2) \| Respond to of 186894

Katmai? <<This shows the headroom in Intel's .25 micron process. In fact Intel's .25 micron process is very likely to be tighter (ie. smaller) in gate oxide and channel length. It is much, much faster than AMD's.>> Do you know what is the gate oxide for this process is (electrically measured and optically measured)? Also what is the channel length? <<Katmai will initially use a 100-MHz system bus, but analysts have said that Intel will likely shift toward a 200-MHz system bus shortly thereafter>> If the bus is at 200MHz then what type of memory will be used? SDRAM can only go to 100MHz and a bit more, surely not 200MHz. If Rambus is used which can exceed 500MHz then what is the use of the L2 cache SRAM? Maxwell