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To: LTBH who wrote (753)	5/21/1998 3:16:00 PM
From: Howard R. Hansen	Respond to of 14778

>> remember that EDO is 60/70 ns while SDRAM is 6/8/10ns. << This statement is misleading. SDRAM uses a 5/1/1/1 burst mode timing cycle. In burst mode the first read requires 5 clock cycles and the next three reads require 1 clock cycle per read. If the data you want is in consecutive memory locations, which by definition it is in burst mode, three of the four reads are done at a very fast rate and one of the four reads is done at a slow rate. Burst mode woks very nicely when data the CPU needs is not in cache and is used to fill the cache. However, in random access mode SDRAM is no faster than EDO RAM. Hence for SDRAM 60/70 ns is nearer to the maximum time it takes to read data from a random location and 3 times 6/8/10 ns are the maximum times it takes to read data from the next 3 consecutive memory locations. The information for this post comes from Toms Hardware Guide and the links in his explanation for how SDRAM operates. However, I didn't see any explanation in the links of what happens in write mode. Hence until somebody corrects me I assume all writes for SDRAM take place at the random access read rate.