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To: FJB who wrote (6389)	5/29/1998 6:08:00 PM
From: Ali Chen	Read Replies (1) \| Respond to of 6843

Robert, <what "manufacturing problem" Intel is having with Merced?> What kind of manufacturing "problem" could be accounted if the chip is TWO YEARS before manufacturing? Do you remember how long it took Intel to finish their star project "iAPX432", just to dump it into a trash? I tend to believe that all these delays are caused by insufficient background behind the EPIC architecture itself. I suspect that the massive simulations performed in Intel-affiliated research universities have revealed more than mediocre performance advantages over regular RISC architectures. My guess is that Intel is trying to patch some holes in the architecture and went again out the silicon area affordable at 0.18um technology. Merced = R.I.P.

To: FJB who wrote (6389)	5/30/1998 1:51:00 PM
From: Yousef	Read Replies (2) \| Respond to of 6843

Bob, Re: "Yousef, Can you find out what "manufacturing problem" Intel is having with Merced?" Bob, this will be very difficult to get a "real" answer ... I don't buy this "manufacturing problem" answer. I would be happy to give my "opinion" on this ... My information says that the Intel .18um process is still on schedule for a fall '99 release ... in plenty of time for Merced. I believe that the problem with Merced is in "chip design". Typically, a chip design schedule can be traded-off with chip size. Thus a shorter schedule usually results in a larger die. My "opinion" is that the Merced design is already very large (~20mmX20mm) and Intel has serious concerns about manufacturing a die of this size as well as Intel can't pull up the design schedule as Merced could grow even larger . Thus, Intel is having to push out the release date for Merced basically because the design is going slower than expected. There could be other factors since this is a new architecture ... i.e. feedback from simulation/emulation could be slow or more needed to optimize the CPU design. Things like this would also slow down the design. The Intel .18um process will be highly leveraged from their "excellent" .25um process. The .18um process will be about ~30% faster on benchmark circuits and with provide a ~70% linear shrink. I expect that this new process will be on schedule and meeting release metrics. One way to check on this is to watch the other chips to be released by Intel in this process (Fall '99 releases) ... If these chips aren't "slipping", then it isn't a .18um process issue. Hope this helps. Make it So, Yousef