This came out tonight:
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Posted: 6:00 p.m., EST, 6/16/98
EDA hits a 0.25-micron wall
By Richard Goering
SAN FRANCISCO - The EDA industry has reached a critical juncture because it hasn't produced the tools needed for 0.25-micron designs, according to Gary Smith, chief EDA analyst for Dataquest Inc. (San Jose, Calif.). Speaking at the market research firm's annual briefing prior to the start of the Design Automation Conference (DAC), Smith said the lack of tools is causing severe challenges for semiconductor vendors.
Smith noted two other recent and surprising developments. One is a slowdown in the spread of Windows NT, and the other is a shift away from "power users" as the primary source of EDA industry revenue.
Aart de Geus, chairman and chief executive officer of Synopsys Inc. and chairman of the Electronic Design Automation Consortium (EDAC), kicked off the Dataquest gathering by stating that this year's DAC occurs at a "pivotal moment" because of radical changes occurring in technology, and because of the ongoing Asian financial crisis.
"If we look forward the next two or three years, the very foundation of the semiconductor industry will be shaken up significantly," said de Geus. "EDA is going to be absolutely front and center. This is the industry that's enabling the change."
Although EDA industry growth continues to be strong by most standards, Smith is projecting a declining growth rate, from 23 percent in 1996 to 16 percent in 1997 and 15 percent in 1998. "The reason the forecast is down is that we've run out of tools," he said. "We hit the wall at 0.25 microns."
As a result, Smith said, the 10 leading system-level integration (SLI) semiconductor vendors are okay, but "the rest of the semiconductor world is in deep trouble." Those ten vendors, as named by Dataquest, are LSI Logic, IBM, VLSI Technology, Lucent, NEC, Texas Instruments, Motorola, Hitachi, Toshiba and Fujitsu.
There is, however, a bright spot - the flood of EDA startups exhibiting at DAC. "I was depressed a month ago, but I'm not now," Smith said. "A lot of it is startups - they're the ones who are going to solve some of the problems."
Bryan Lewis, principal ASIC and SLI analyst at Dataquest, spoke of the difficulties of the move to 0.18-micron designs and of copper interconnects. He said that semiconductor companies are thinking of restarting their internal tools groups.
"We're only getting 40 percent of the silicon efficiency we could get if we had tools that could utilize the technology that's out there," Lewis said. "That's the design gap." One specific problem, Lewis said, is the lack of 64-bit platforms.
For Smith, a fundamental missing ingredient is the lack of a "silicon virtual prototype," which is needed at the register-transfer level to predict the effects of silicon on design. One of the biggest problems that emerges at the 0.25-micron level is electromigration. "We could be shipping time bombs," Smith said, though he noted that copper interconnects solve that problem.
Given the difficulties of doing 0.25-micron design, and with yields at that level as low as 35 to 40 percent, Smith said that a lot of companies are holding back from designing at that level, and that some fabs built to handle 0.25-micron designs are running 0.35-micron chips instead.
In spite of the need for high-powered tools, it appears that power users are no longer driving the EDA industry, Smith said. In 1997, for the first time, a segment that Smith called the "upper mainstream" market bought more tools than the power users.
But that doesn't mean the EDA world is shifting to Windows NT. In fact, Smith said, Windows NT's growth is falling well short of expectation, and probably won't even account for 25 percent of EDA market revenues by 2000. There are three reasons for this, Smith said: Bill Gates' performance in front of the Senate; an emotional bias against Microsoft; and the fact that 64-bit Windows NT has been delayed.
Smith forecasted a $2.5 billion software-only worldwide EDA market for 1998, growing to $4.6 billion by 2002.>>>> |
