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Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: Maxwell who wrote (63201)	8/24/1998 9:10:00 AM
From: Maxwell	Read Replies (2) \| Respond to of 186894

INTC Low End CPU Strategy: There is a million way to make cheap CPU and Intel chose the worst solution by making the Mendocino. Why? Mendocino has 128K cache. 128K cache consists of 6.1M transistors and take up an additional silicon space of 30mm^2. This extra cache takes 20% extra in silicon die size. The result is that the maximum number of dice/wafer drops from 180DPW to 150DPW. To reach the same number of dice out per quarter Intel has to increase their capacity by 20%. Fab labor/equipment/silicon are expensive. Another important factor is that the as the die size goes up the % yielded versus the smaller die size goes down. This is the result of increase in the complexity of the chip and likely chance to get killed by defects. The result is that the CeleronA is more expensive to produce than the PII. Furthermore the Celeron would still have to be packaged in the daughtercard. What could Intel have done? If I was them I would still make the Celeron but add in very cheap and slow SRAM such as 128K or 256K. Slow means 1/3 CPU speed or 100MHz (same as SS7) or what ever that is cheap. I would say get the 128K for a couple of bucks. In that way the Celeron reputation is restored and nobody would argued a cacheless PII. I rather subcontract out to a vendors to surface mount the cheap cache to reduce cost. The result is that the performance of newer Celeron is still slower than the PII but significantly faster than the cacheless Celeron. Thus Intel can streamline their production and make only one product (one retical mask set). This product will be used in the BX chipset of 100MHz so people would feel an upgradable path to PII. As you know the BX MB has more PCI slots and runs 100MHz FSB vs the 66MHz. Slot 1 is still intact and won't make people feeling nervous going to socket 370. As you can see the solution is so simple and Intel doesn't see it. They had to dispatch over 600 engineers to work on the problem and still can't get it right. In semiconductor the low cost solution is a SMALLER DIE. So much said. Now you know why the CHIMP is smarter than the GORILLA. Maxwell