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To: MONACO who wrote (64129)	9/9/1998 2:02:00 AM
From: Paul Engel	Read Replies (2) \| Respond to of 186894

Monaco - Re: "can you explain what this is all about, an what significance it has in the realms of the universe?? " This is a "power struggle" of sorts to determine the physical and electrical interface of a faster external bus for advanced Server systems. Apparently, HP, Compaq and IBM cooked up an extension, PCIx, to the existing PCI bus on their own and dumped it in Intel's lap only a week ago, as fait d'accompli. The HP, IBM Compaq troika may (it isn't clear) want to keep this proprietary and/or charge royalties in order to give themselves some competitive advantage over companies like Dell that use Intel "canned" Server solutions. Meanwhile, Intel seems to have only recently released "advanced PCI" chip sets of its own that extend the bus to 66 MHz and 64 bits wide. For a much more advanced bus, Intel seems to be re-evaluating the parallel bus in its entirety, looking instead at a Gigabit serial bus, more akin to the I/O Channel structure commonly used by mainframes. So, there is bound to be a long, protracted, public battle for control of the future server architecture - it appears to be starting rather ugly. Paul

To: MONACO who wrote (64129)	9/9/1998 3:44:00 AM
From: Tenchusatsu	Read Replies (3) \| Respond to of 186894

Monaco, Paul can you explain what this is all about, an what significance it has in the realms of the universe?? eet.com Despite Paul's theories over a power struggle, I believe simply that Compaq and HP are just getting nervous over the current PCI barrier at 66 MHz and 64 bits. In order to push the highly successful PCI bus into the high-end servers, they feel that PCI-X may provide the high performance solution they desire while maintaining backwards compatibility. From an engineering standpoint, I don't see how PCI-X is going to be 133 MHz and still be able to support up to seven (or so) devices on one symmetric bus. Even Intel has to work hard to try and push a four-way processor bus to 133 MHz using GTL+, and PCI (currently) doesn't use GTL. I'm sure that a 133 MHz PCI bus can be done, but the 133 MHz mode is going to be radically different from the 66 MHz mode simply because of the physics of the platform. I'll find out more about this PCI-X thing. But I am excited over the proposed NGIO protocol, even though its incompatibility with PCI is going to be a huge issue. In conclusion, I think this isn't much of a "struggle," but more of an effort for the big players to cooperate on developing a common standard for high-speed device buses. If this were a power struggle, Compaq and HP would just say, "The hell with it" and go ahead without asking for Intel's blessing. Tenchusatsu