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Technology Stocks : Semiconductor Industry Sales Trends -- Ignore unavailable to you. Want to Upgrade?


To: Ed Hawkins who wrote (95)9/22/1998 1:58:00 PM
From: Henry D  Respond to of 105
 
anyone has data on IC year to year growth on a monthly results?



To: Ed Hawkins who wrote (95)9/23/1998 1:54:00 PM
From: Michael Sphar  Respond to of 105
 
OKI capitulation, note capital spending reduction:

A service of Semiconductor Business News, CMP Media Inc.
Story posted 1:30 p.m. EDT/10:30 a.m. PDT, 9/22/98

Oki to pull out of 256-megabit DRAM race

TOKYO -- Oki Electric Industry Co. here will withdraw from the
next-generation DRAM market by scrapping plans to
mass-produce 256-megabit memory chips, company president
Katsumasa Shinozuka, said at a news conference today.

Shinozuka said Oki would concentrate on producing chips for its
core telecommunications and custom applications business. As a
result, he expected DRAMs to fall from 30% of chip revenues this
year to 15%.

Oki expects to report a $318 million (43 billion yen) loss for the
current fiscal year ending next March 31. The firm is cutting its
capital spending on semiconductors to $94 million (12.4 billion
yen) in the current fiscal year, down from $312 million (42.4 billion
yen) in the year ending March 31, 1997.



To: Ed Hawkins who wrote (95)9/23/1998 1:58:00 PM
From: Michael Sphar  Read Replies (2) | Respond to of 105
 
MU branching out into SRAM:

A service of Semiconductor Business News, CMP Media Inc.
Story posted 3 p.m. EDT/noon PDT, 9/22/98

Micron samples 400-MHz 4-megabit DDR SRAM

BOISE, Ida. -- Micron Technology Inc. here announced today
that samples of 400-MHz double data rate (DDR) SRAM are
currently shipping for engineering evaluation.

"Our 4-megabit DDR SRAM is designed to meet the high-speed
cache and buffer memory requirements for leading-edge
microprocessors and network systems designs," said Mike Black,
Micron Technology's SRAM marketing manager.

"Data communication applications can also take advantage of the
400-MHz data rate to maximize bandwidth in high-speed traffic
designs," he added. "The fastest control signals operate at one-half
the selected data rate. This feature allows relatively slow ASICs to
control much faster data flow."

Produced on Micron's state-of-the-art, six-transistor cell process,
the 400-MHz DDR SRAM is a next-generation cache architecture
for workstations and servers, as well as high-speed memory for
networking and data communications. "Our goal was to utilize our
CMOS technology to reduce the cost of very high-performance
DDR SRAMs," said Black.

Micron is currently working on a 450-MHz version of this
product.