To: Boplicity who wrote (7398 ) 9/23/1998 8:40:00 PM From: MileHigh Read Replies (1) | Respond to of 93625
RMBS mention, not sure how or to what extent RMBS will be utilized...Virtual Channel DRAM is mentioned... From a previous NEC release... Santa Clara, Calif. - The virtual channel memory, an NEC Corp. innovation that boosts DRAM performance by reducing latency, is picking up momentum among DRAM manufacturers. Several vendors are considering pairing the VCM core to a fast memory interface, in a move that would pose a challenge to Direct Rambus DRAMs in both high-end computers and low-end consumer products. MileHigh ==================== Technology News NEC Introduces PowerVR 3-D Engine (09/23/98 10:54 a.m. ET) By Anthony Cataldo, EE Times As it strengthens its ties to Sega Enterprises, NEC Electronics is preparing its PowerVR 3-D architecture for an assault later this year on the fiercely competitive market for PC graphics controllers. The move is part of a strategy to drive the company's 0.25-micron PowerVR into volume production by spinning out PowerVR chips that are identical at their core, varying only in peripheral interfaces and control functions. At the Japan Amusement Machinery Manufacturers Association this week, Sega announced NEC's PowerVR Series2 device, which was designed in conjunction with NEC's partner VideoLogic, will ship as one of two key processing engines for its new Naomi arcade-game hardware platform. Sega claims Naomi will achieve more than 3 million polygons per second, and boasts a polygon fill rate exceeding 1 gigapixel per second. Naomi is basically a beefed-up version of the Dreamcast game-console platform, which will make its debut in Japan in November. NEC hopes to piggyback on Sega's strategy with its PowerVR 3-D architecture by spreading across several platforms, beginning with Sega's game consoles and arcade-game systems. Later this year, it will unveil its 3-D/2-D chip for the PC market in hopes of challenging companies such as Nvidia and 3Dfx. Unlike those competitors, however, NEC decided not to widen the memory bus to 128 bits as a way to boost bandwidth to the graphics subsystem's frame-buffer memory. Charles Bellfield, marketing manager for the VR series, said the company's use of hidden-surface removal, whereby only visible polygons are fully rendered on screen instead of having them overlap, lets the PowerVR graphics subsystem do without a Z-buffer. Such a scheme also boosts the effective polygon fill rate without having to open up the memory pipe, Bellfield said. The PC graphics chip is designed to interface to a minimum of 2 megabytes of Synchronous Dynamic RAM or Synchronous Graphics RAM, and there are no limits on the expandability of the graphics memory size. The device will support 2X Accelerated Graphics Port with sidebanding as well as 32-bit, 66-MHz Peripheral Component Interconnect. It's also designed to output to both TV-out and flat-panel displays in addition to conventional cathode ray tube monitors. Along with making improvements to the 3-D pipeline of the chip itself, NEC is looking to bolster performance with faster chips surrounding the 3-D device. For example, NEC is considering using Direct Rambus DRAM and Virtual Channel Memory DRAM as a means to increase bandwidth and reduce DRAM latency. NEC plans to produce both types of memories. The company also plans to roll out a geometry-setup co-processor, perhaps by next year. The device will be designed to churn out more polygons than general-purpose CPUs, which many observers say create a bottleneck in the graphics subsystem. Most graphics engines are capable of processing triangles much faster. "The performance of the CPU is too poor to get good detail," Bellfield said. "[The movie] Jurassic Park, for example, had 20 million polygons per second. That's the kind of immersiveness that games want to reach." That's why Sony is looking toward non-polygon-based 3-D graphics technologies for the next-generation PlayStation.