To: Maverick who wrote (38226 ) 10/5/1998 11:05:00 PM From: Petz Read Replies (4) | Respond to of 1574265
More public info on the K7, from the Maximum PC mag interview with Atiq Raza: 1. Will "launch...higher than 500 MHz." 2. "The K7 will have up to a 200 MHz data transfer rate but we can go above that."... and then later, "The [bus] protocol allows it to run at very high bandwidth. The frequency is going to be in the hundreds of MHz. And the transfer of information is unimpeded by the way the connections of wires go [?] -- of address and data going back and forth." 3. On the floating point performance: "We will [beat Intel's floating point performance]. The floating point in the K6-2 -- the classic IEEE-built precision floating point -- is not of the quality I would like it to be... With K7 we will make no apologies. Double-precision/ Single-precision, 3D technology extensions as well as double-precision classical IEEE floating point. Again, the K7 will be the highest performance processor, in both integer and floating point." 4. On K7 marketing strategy: "We intended K7 to be a server product, and to take advantage of the server infrastructure provided by Alpha. But at the same time, having a cost structure and capability that would make it a compelling consumer product and a compelling commercial product too." 5. Other technical info: "For the most part, the K7 will be a fully three-way superscalar. The 3D pipeline is a 128-bit-wide pipeline, and it too will include backward compatibility with the 3D extensions. The floating point and 3D performance is just awesome. It's a vector engine, so you can process more floating-point arithmetic in parallel." This is the first time I've heard that K7's 3Dnow will be improved vs. K6-2's, and it sounds like 3DNow performance will not be limited to single precision as it is now (and also for the Katmai). It's very possible that using 3DNow you could get eight single precision floating point ops per clock cycle, or two double precision floating point ops per clock cycle. (Four 32-bit operands per 3DNow instruction, two 3DNow instrucions retired each clock cycle.) Perhaps this enhanced 3DNow will be compatible with Apple's AltiVec instructions. Seems to me Motorola, AMD's new ally may be somewhat familiar with AltiVec. Petz