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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Maxwell who wrote (39202)10/13/1998 3:38:00 PM
From: Steve Porter  Read Replies (3) | Respond to of 1573841
 
Maxwell,

Probably. You have to remember that the director of K7 is a guy who
co-designed the Alpha 21264. He probably has done some simulation
already and knows what best. He has taken a lot of design in Alpha
to bring into K7.


I just hope he stole the FPU ;-)

Now that I think about it the latency of 2 is about correct. Remember
that the fastest SRAM is currently about 2ns. At this response the
fastest speed is 1/2ns=500MHz. Thus to get the speed beyond 500MHz
higher latency of 1 is a must. Otherwise the CPU and L1 is out of
synchronization.


Maxwell are you implying the minimum ammount time required to switch a SRAM from 0 to 1 or vice-versa is 2ns. This doesn't seem right to me. This would seem to indicate that a transistor can only switch at 500Mhz.. I just can't see how there can be a limiting speed (ofcourse I'm not putting much thought into it yet... I'll let you explain first) ;-)

Steve



To: Maxwell who wrote (39202)10/14/1998 12:27:00 AM
From: Paul Engel  Read Replies (2) | Respond to of 1573841
 
Maxwell - re: "that the director of K7 is a guy who co-designed the Alpha 21264. "

This guy Dirk Meyer joined AMD in 1995.

Digital didn't begin the 21264 design until late 1995 or early 1996 - it still hasn't even been formally introduced as of LATE 1998..

How could this guy have designed the 21264 at DEC when he wasn't even there at the time?

Paul