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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Brian Hutcheson who wrote (39564)	10/18/1998 12:33:00 AM
From: Yousef	Read Replies (1) \| Respond to of 1578494

Brian, Re: "Guys like Dirk Meyer he knows how to design a cpu that can run at high speed , like the Alpha . Go AMD , Brian" Brian, you are acting "blinkered" again ... Just repeating the AMD HYPE. Please "wake up" and smell the "cheap coffee". <ggg> Make it So, Yousef

To: Brian Hutcheson who wrote (39564)	10/18/1998 1:07:00 AM
From: Scumbria	Read Replies (3) \| Respond to of 1578494

Brian, Jim , re. prepare for the 400 rollout. yes and according to Tom Pabst it incorporates some new design features and is not just a better quality 350 . I have very hard time believing that AMD would: 1) Jeopardize a critical speed bump with any significant "new design features" or 2) Have had time to implement any significant new design features. I can believe that they did some speed path fixes since 350. Scumbria

To: Brian Hutcheson who wrote (39564)	10/20/1998 12:12:00 AM
From: Jeff R	Read Replies (1) \| Respond to of 1578494

The k6 and Pentium were both designed with Socket 7 in mind and therefore happen about to have about the same number of pipeline stages. 6 or 7 would be a guess. The k7 and Pentium II were both designed with deeper pipelines stages. Therefore, they both inherently clock higher at the same process technology. When a CPU has a deeper pipeline, the L2 cache fill latency is the important issue. With a dedicated backside cache the access latencies are lower than the Socket 7 style fronside bus plus the L2 cache scales with processor frequency thus giving it a big advantage. It's remarkable in my mind that the K6 can get even close to the Pentium II as far as clock frequency given Intel's advantage in deeper pipelining and so called inherent process advantage. Actually, AMD has a more complex process than Intel in that they have 5 levels of metalization with local interconnect plus shallow trench isolated transistors with C4 bonding. I think Intel is using 4 level of metalization and is still using wire bond technology. Intel's advantage is that their manufacturing process is probably less complex and therefore yields higher and for the sake of having a considerable die size disadvantage. AMD is getting their speed up on the K6-2 device by lowering the Leff of their transistors and by essentially migrating to 0.18 micron transistor before the whole process is ready to move. For the most part, AMD design engineers are not optimizing speed paths but are relying on process optimizations. When the K6-2 was released it incorporated 3D-Now. As you well of read on Tom's Hardware Guide, the K6-3 has both 3D-now, 256 L2 on chip cache, plus a 10-15 core optimization gain outside the inherent performance increase of the on chip cache. My best guess is that K6 design engineers found out that they could do some core optimization tweaks which would allow them to get better performance on 32-bit OS's like Windows NT. From reading Tom's article, it looks like that core will be a part of the k2-400 and above and K6-3 products.